Insulated gate field effect transistor

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357 234, 357 235, 357 238, H01L 2976, H01L 2978, H01L 2994

Patent

active

046564926

ABSTRACT:
An insulated gate field effect transistor is formed in one surface of a semiconductor substrate. The surface portion of a channel has an impurity distribution of the conduction type opposite to that of the substrate, which the deeper portion of the channel has an impurity distribution of the same conduction type as that of the substrate. Moreover, at least one of a source and a drain is formed of such an impurity layer of the conduction type opposite to that of the substrate as has its impurity distribution gently sloped by double diffusion processes.

REFERENCES:
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patent: 4070687 (1978-01-01), Ho et al.
patent: 4078947 (1978-03-01), Johnson et al.
patent: 4212683 (1980-07-01), Jones et al.
patent: 4242691 (1980-12-01), Kotoni et al.
patent: 4276095 (1981-06-01), Beilstein, Jr. et al.
patent: 4306352 (1981-12-01), Schrader
"Design and Characteristics of the Lightly Doped Drain-Source (LDD) Insulated Gate Field-Effect Transister", Ogura et al., IEEE Transactions on Electron Devices, vol. ed-27, No. 8, Aug. 1980, pp. 1359-1367.
"Threshold-Sensitivity Minimization of Short-Channel Mosfet's by Computer Simulation", Yokoyama et al., IEEE Transactions on Electron Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1509-1514.

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