Insulated gate field effect silicon-on-sapphire transistor and m

Details Insulated gate field effect silicon-on-sapphire transistor and m Insulated gate field effect silicon-on-sapphire transistor and m

1978-08-29

1980-04-22

Wojciechowicz, Edward J.

357 4, 357 42, 357 49, 357 89, 357 91, H01L 2972

Patent

active

041997735

ABSTRACT:
A silicon-on-sapphire structure and method for forming the same is described wherein the leakage current attributable to "back channel" leakage is minimized by forming the channel region in such a manner as to have provided therein at least two levels of dopant concentration. The heavier level of dopant concentration is positioned adjacent the silicon/sapphire interface while the lighter level of dopant concentration occupies the remainder of the channel region and is shallower than the heavier level. The classic inversion process takes place in the lightly doped section at the shallow level.

REFERENCES:
patent: 4106045 (1978-08-01), Nishi
patent: 4143266 (1979-03-01), Borel et al.

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