Insulated gate control thyristor

Details Insulated gate control thyristor Insulated gate control thyristor

1992-03-05

1994-01-25

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

With extended latchup current level

257151, 257152, 257153, H01L 2974, H01L 31111

Patent

active

052818330

ABSTRACT:
An insulated gate control thyristor including an n-type base region, an insulating layer, gates formed on the insulating layer, first and second windows formed in the insulating layer, p-type emitter layers and n-type cathode layers diffused into the base region from the first windows, and p-type collector layers diffused into the base region from the second windows. The emitter layer and the collector layer are disposed in close proximity to each other under the gate so that a channel is formed which is conducted when the thyristor is turned off. The turn-off of the thyristor speeds up and becomes reliable, and the quality control of the process steps for fabricating the thyristor becomes easier.

REFERENCES:
patent: 5155569 (1992-10-01), Terashima
"The MOS Depletion-Mode Thyristor: A New MOS-Controlled Bipolar Power Device" Baliga et al., IEEE Electron Device Letters, vol. 9, No. 8, Aug. 1988, pp. 411-413.
B. Jayant Baliga, "The MOS-Gated Emitter Switched Thyristor Electron Device Letters", vol. 11, No. 2 (Feb. 1990) pp. 75-77.
V.A.K. Temple, "MOS Controlled Thyristors (MCT'S)" IEDM (1984), pp. 282-285.

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