Insulated gate bipolar transistor having a specific buffer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with field effect transistor

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Details

257140, 257142, H01L 27082, H01L 2970, H01L 27088

Patent

active

053609832

ABSTRACT:
An n.sup.+ buffer layer, that is located between an n.sup.- base layer and a p.sup.+ substrate, has a resistivity in the range of 0.005-0.03 .OMEGA.cm and a thickness not more than 10.mu.m. Further, the base layer has an impurity concentration not more than (0.3.times.I.sub.1)/(S.times.1.6.times.10.sup.-19 .times.6.0.times.10.sup.6), where I.sub.1 is a rated current in ampere and S is an effective are in cm.sup.2.

REFERENCES:
patent: 5124772 (1992-06-01), Hideshima et al.
patent: 5237183 (1993-08-01), Fay et al.

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