Insulated gate bipolar transistor

Details Insulated gate bipolar transistor Insulated gate bipolar transistor

1988-05-17

1992-01-07

Hille, Rolf

357 34, 357 35, 357 55, H01L 2910, H01L 2972, H01L 2906

Patent

active

050796020

ABSTRACT:
An insulated gate bipolar transistor has a P-type well region (3) which is partially formed in a surface of an N.sup.- -type epitaxial layer (2) formed on a P.sup.+ -type semiconductor substrate (1). A trench (14) is formed in a central portion of the P-type well region (3), and an N.sup.+ -type emitter region (4) is formed in a surface of the P-type well region (3) around the trench (14). The N.sup.+ -type emitter region (4) is provided thereon with an emitter electrode (7), which is extended into the trench (14) as a conductive layer to electrically connect a deep portion of the P-type well region (3) with the N.sup.+ -type emitter region (4). Thus, vertical resistance of the P-type well region (3) is reduced, whereby base-to-emitter resistance of an NPN transistor defined by the N.sup.- -type epitaxial layer (2), the P-type well region (3) and the N.sup.+ -type emitter region (4 ) is reduced to prevent a latch-up of a parasitic PNPN thyristor. Furthermore, by means of impurity diffusion on the side wall and/or the bottom of the trench (14), the high impurity concentration region is formed in the deep portion of the P-type well region (3). Especially, lateral impurity diffusion results in reducing the resistivity of the region of the P-type well just under the N.sup.+ -type emitter region (4). This prevents the NPN transistor from being in conductive state. Thus, the latch-up of the parasitic PNPN thyristor is further prevented.

REFERENCES:
patent: 4801985 (1989-01-01), Baliga et al.
patent: 4835586 (1989-05-01), Cogan et al.
"Improved COMFETs with Fast Switching Speed and High-Current Capability", 1983 IEEE IEDM 83, pp. 79-82.
"The Insulated Gate Transistor . . .", IEEE Transactions on Electron Devices, vol. ED-31, No. 6, Jun. 1984, pp. 821-828.
"Experimental and Numerical Study of Non-Latch-Up Bipolar-Mode MOSFET Characteristics", 1985 IEEE IEDM 85, pp. 150-153.

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