Insulated gate bipolar transistor

Details Insulated gate bipolar transistor Insulated gate bipolar transistor

1989-09-01

1991-06-11

Hille, Rolf

357 234, 357 34, 357 38, H01L 2702

Patent

active

050236911

ABSTRACT:
An IGBT has an emitter bypass structure. The interval D between N emitter regions is adapted to be larger than two times of a channel length L in order to effectively decrease a channel width to effectively decrease a saturation current. A high concentration region may be provided in a P base region, which is closer to the end portion of the P base region than the emitter regions between the emitter regions, so that the channel width can be effectively decreased even without the relation of D>2L. A channel width per unit area W.sub.U may be in a range of 140 cm.sup.-1 .ltoreq.W.sub.U .ltoreq.280 cm.sup.-1 in an IGBT of a breakdown voltage class of 500-750 V or 70 cm.sup.-1 .ltoreq.W.sub.U .ltoreq.150 cm.sup.-1 in an IGBT of a breakdown voltage class of 1000-1500 V, so that an IGBT having a short-circuit withstandability and a latch-up withstandability suitable for an inverter can be implemented.

REFERENCES:
patent: 4441117 (1984-04-01), Zommer
patent: 4532534 (1985-07-01), Ford et al.
patent: 4672407 (1987-06-01), Nakagawa et al.
patent: 4680604 (1987-07-01), Nakagawa et al.
patent: 4760431 (1988-07-01), Nakagawa et al.
patent: 4841345 (1989-06-01), Majumdar
Nakagawa et al., "Safe Operating Area for 1200 V Nonlatchup Bipolar Mode MOSFET's", 2/1987, IEEE, vol. ED-34, No. 2.
Kondo et al., "A New Bipolar Transistor-GAT", Feb. 1980, IEEE, vol. ED-27, No. 2.
Nakagawa et al., "Non-Latch-Up 1200 V 75 A Bipolar-Mode MOSFET with Large ASO", 1984, IEDM.

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