Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area
Reexamination Certificate
1998-10-27
2002-06-11
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With enlarged emitter area
C257S587000, C257S590000
Reexamination Certificate
active
06404037
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an insulated gate bipolar transistor and to a method of forming the same. In particular, the present invention relates to an insulated gate bipolar transistor having improved reverse bias conducting properties and a method of forming the same.
BACKGROUND OF THE INVENTION
Insulated gate bipolar transistors (IGBT's) are well known in the art and have found particular application in the driving circuits of compact fluorescent lamps. In such applications, the much larger current density which can flow through the IGBT when switched on and forwardly biased, when compared with a power MOSFET, is of significant advantage.
However, it is also typically required of such transistors that they are able to conduct freely when reverse biased. Conventionally IGBT's have provided for reverse bias conduction simply by introducing a diode in parallel with the collector and emitter electrodes of the transistor but formed separately from the transistor itself. Clearly this increases the die size required by the combination of transistor and diode thus minimising the advantage of the IGBT over a conventional power MOSFET.
A solution to the problem of providing reverse bias conduction without having to provide a separately formed diode has been proposed which essentially comprises connecting the collector electrode to an end channel region of the IGBT. In addition, the end channel region must be widened so as to minimise the voltage, Vf, produced across the transistor when conducting in a reverse bias mode. However, although widening the end channel region in this way reduces Vf there is a limit to how much the Vf can be reduced in this way without affecting the operation of the transistor in its forward bias mode. This results in the significant disadvantages of having an undesirably large Vf in addition to an undesirably large end channel region.
The present invention seeks to provide an IGBT and a method of forming the same which at least mitigates the disadvantages of the prior art devices discussed above.
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“Optimized Local Lifetime Control For The Superior IGBTs”, Konishi et al., Proceedings of the 8thInternational Symposium on Power Semiconductor Devices and IC's (ISPSD), Maui, Hawaii, May 20-23, 1996, p. 335-339.
“NPT-IGBT—Optimizing For Manufacturability”, Burns et al., Proceedings of the 8thInternational Symposium on Power Semiconductor Devices and IC's (ISPSD), Maui, Hawaii, May 20-23, 1996, p. 331-334.
Fourson George
Semiconductor Components Industries LLC
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