Instruction set for controlling a processor to convert...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C712S220000, C712S221000

Reexamination Certificate

active

06529922

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to an instruction set for controlling a signal processor and particularly to an instruction set for controlling a sound effects audio signal processor within an audio system.
Sound effects audio signal Drocessors (ASPs) are commonly used to generate sound effects in a multitude of audio components, some examples being programmable musical instruments, video games, cinema sound systems, virtual reality systems, and computer audio systems.
ASPs create sound effects by executing programs containing a series of instructions. Each instruction directs the ASP to perform a specific logical and/or arithmetic operation on the received signal,-resulting in the program's creation of a particular sound effect.
Conventional ASPs, such as that disclosed in U.S. Pat. No. 5,376,752 to Limberis et al., incorporated herein by reference, employ instructions primarily designed for use in general purpose digital signal processors (DSPs). General purpose DSP instructions are well-known in the art and include arithmetic instructions such as “Accumulate,” “Multiply and Accumulate,” as well as logical instructions such as “AND,” “OR,” and “XOR.”
While many ASPs make use of the conventional DSP instructions, instructions with special characteristics are needed to meet the particular demands of processing audio signals. For instance, ASPs require a constant output sample rate since delays in or deviation from the ASP's output sample rate result in unwanted audible gaps or signal distortion. A constant output sample rate is usually ensured by executing the same number of instruction for each sound effects program, where each instruction takes the same amount of time to execute.
Conventional DSP conditional instructions such as IF/ELSE IF/ELSE instructions cannot be easily used in ASPs since the number of executed instructions may not be the same as programs not having the conditional instruction, or the number of executed instructions within the particular program may be different depending upon if the condition is TRUE or FALSE. However, conditional instructions remain valuable programming tools in creating sound effects. Therefore, a need exists for a conditional instruction which when executed, executes the same number of instructions as those programs without the conditional instruction, and will execute the same number of instructions within the program regardless of the whether the condition's result is TRUE or FALSE.
Another requirement particular to ASPs is the conservation of the information content of signals having widely varying magnitudes. Conventional linear to logarithmic conversion DSP instructions, such as the IEEE floating point instruction, generate a logarithmic representation having fixed exponent and mantissa fields. Because the exponent and mantissa fields are of a fixed length, signal information which is stored beyond those fields is lost.
What is needed is a linear to log conversion instruction which can define the exponent and mantissa fields of the log value, so that either field may be expanded or contracted to retain important signal information. Further distinctive from conventional DSPs is the generation of special audio effects and waveshaping. Conventional DSP instructions do not provide the necessary waveshaping operations needed for creation of specialized audio effects.
Special ASP instructions could be added to an existing DSP instruction set, but the addition of a large number of instructions to the existing instruction set may be precluded by the limited size of the ASP's existing instruction memory. Although a small addition may not be precluded, any addition would require the allocation of a larger instruction memory within the ASP, driving up the ASP's fabrication cost.
What is needed is an ASP instruction set having a minimal number of multi-functional instructions, whereby a single instruction can be used to provide both conventional DSP and specialized operations. Further needed is the ability to reuse the instruction's specialized operations to formulate other specialized operations, thereby enabling the creation of a multitude of different sound effects with the same instruction set.
SUMMARY OF THE INVENTION
The invention provides an instruction set for control of an audio signal processor that allows for greater flexibility in generating desired sound effects. The instruction set serves as a multi-functional instruction base upon which other specialized sound effects can be constructed. Many instructions according to the present invention provide complex processing in a single instruction cycle. Also in the case of conditional execution, processing can be made to remain synchronous with programs not possessing conditional instructions.
In one embodiment of the present invention, a method for computing logical operations within a processor includes the steps of receiving a single machine instruction having a first address specifying a first operand, a second address specifying a second operand, and a third address specifying a third operand, and computing in a single instruction cycle a result equivalent to a logical XOR operation between the third operand and an intermediate result of a logical AND operation between the first operand and the second operand.
In another embodiment of the invention, a method is provided for converting linear data into logarithmic data, the method including the steps of receiving a first instruction having a first address for specifying linear data, a second address for specifying a maximum exponent value, and a third address for specifying an output operand, and converting the linear data to logarithmic data by the steps of allocating a Q-bit long exponent field within the output operand, where Q is dependent upon the maximum exponent value, calculating a Q-bit long exponent value, calculating a mantissa value as a result of the calculation of the Q-bit long exponent value, and storing said exponent value and said mantissa value within said output operand.
In a third embodiment of the invention, a method for converting logarithmic data into linear data is presented and includes the steps receiving an instruction having a first address for specifying logarithmic data having an exponent value and a mantissa value, a second address for specifying a maximum exponent value, and converting the logarithmic data to linear data by the steps of defining the exponent value as having Q-bits, where Q is dependent upon the maximum exponent value, extracting said Q-bit long exponent value from the logarithmic data, defining the remaining bits of the logarithmic data as the mantissa value, and normalizing the mantissa value to a linear value.
In a fourth embodiment of the invention, a method is presented for skipping a subsequent instruction upon execution of a single instruction and includes the steps of receiving a first instruction having a first address for specifying status bits, and a second address for specifying a boolean equation, mapping the status bits into a bit string, applying the bit string to the boolean equation; and processing the subsequent instruction as a NULL instruction in she processor when the application of the bit string to the boolean equation results in a TRUE outcome.
A fifth embodiment of the invention provides a method for calculating a linear interpolation between two values A and Y, and includes the steps receiving in a processor a single instruction having a first address specifying a first operand A, a second address specifying a second operand X, and a third address specifying a third operand Y, and computing in a single instruction cycle, responsive to the instruction a result equivalent to A−X(A−Y).
A further understanding of the nature and advantage of the invention herein may be realized by reference to the remaining portions of the specification and attached drawings.


REFERENCES:
patent: 4131940 (1978-12-01), Moyer
patent: 4438502 (1984-03-01), Fox et al.
patent: 4472993 (1984-09-01), Futamase et al.
paten

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