Instruction sequencer for network structure microprocessor

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365222, 307448, 307463, 307465, 3649291, 3649467, 36496577, G06F 922

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048781959

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION



Background of the Invention

The present invention concerns complex integrated circuits, and more particularly microprocessors, that are circuits capable of carrying out not only a single, well-defined function, but also a variety of different functions. Instructions, received at the input of the microprocessor in the form of coded signals, determine the functions to be carried out. The succession of the instructions received determines the sequence of a complex numerical processing performed by the microprocessor on data also received at the input of the microprocessor.
The microprocessors are circuits of which the complexity is such that their conception requires years of work for the teams that are responsible for this conception.
Not only it is long and difficult to conceive schemas of electric circuits allowing to carry out all the functions desired but furthermore it is necessary to provide that these schemas can be integrated on a silicon chip having reasonably small dimensions, i.e. compatible with sufficient manufacturing yields.
From this necessity results a very large topological implantation or "lay-out", allowing to place in position the different circuit elements within a surface as small as possible. Often, this lay-out work leads to restructuring the electric schemas themselves so that the conception work of the circuit itself and the lay-out work become closely linked.
Furthermore, a microprocessor comprises circuits of which the electrical functions are overall the same for the different microprocessors; accumulators, various registers, instruction decoders, digital and logic unity; possible read-only memories (ROM) and random-access memories (RAM) when they are integrated on the same chip as the microprocessor per se.
When a conception team has worked over a long period on a microprocessor, it wishes to be able to reuse in their definite form, without modifying them or only slightly modifying them, certain parts of the microprocessor which would well be adapted to another microprocessor of the same type. The reutilization allows considerable savings on conception costs, increasingly so since parts whose working has been checked on effectively manufactured microprocessors will be reused; the reutilization without notable modification guarantees correct functioning without requiring new tests for the important units of the new microprocessor.
In order to allow more simply such reutilization of circuit parts having already proved their aptitude at correct functioning, it is desirable to provide that the general structure of the circuit can be adapted to this reutilization; it must be adapted both with respect to the electrical functionality and with respect to the lay-out: it two different clearly distinct functions are toplogically imbricated within each other, it will be practically impossible to decide to profitably reutilize one of the functions without the other. Furthermore, the fact that the groups of circuit elements appear to form topologically units clearly distinct from one another is not a reason for considering that these units can be profitably reutilized if the separation of the functions is not as definite as the topological separation of the units.
The invention concerns more particularly the part of the microprocessor that is called the "instruction sequencer" and of which the function is the following: it receives binary signals representing the instructions to be carried out, signals which are present in the form of several bits in parallel stored in an instruction register; upon a determined instruction, corresponding to a group of well defined bits, the sequencer causes to correspond one or several control signals appearing respectively on the output control lines of the sequencer. These control lines are connected to logic gates or registers or other circuit elements; an instruction actuates a certain number of control lines, in such a manner as to open the logic gates (for example) or load the registers, etc. . . while another instruction wi

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patent: 4583012 (1986-04-01), Smith et al.
patent: 4617649 (1986-10-01), Kyomasu et al.
patent: 4631424 (1986-12-01), Miyagi
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patent: 4675556 (1987-06-01), Bazes
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IBM Technical Disclosure, "Intelligent Alu", vol. 25, No. 12, May 83, p. 6510.

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