Instruction prefetching device having a history table for memori

Details Instruction prefetching device having a history table for memori Instruction prefetching device having a history table for memori

1989-09-21

1992-12-01

Lee, Thomas C.

Boots, shoes, and leggings

3642557, 3642625, 3642631, 3642614, 3649383, 364948, 3649555, 3649601, 364DIG1, 395400, G06F 932, G06F 1210

Patent

active

051685574

ABSTRACT:
In an instruction prefetching device for use in a data processing system, a history table (26) serves not only as a branch history table for memorizing branch predictions but also as a page-over history table for memorizing page-over information. Even when a prefetch real instruction address coincides in an instruction address register 23 with one of page last real instruction addresses, the history table produces a table hit signal and a page-over real instruction address which corresponds to the prefetch real instruction address in the page-over information kept in the history table. Responsive to the table hit signal, an instruction prefetch control circuit (28) supplies, in cooperation with a request address selector (24), the instruction address register with the page-over real instruction address as a next succeeding real instruction address which next follows the prefetch real instruction address to make an instruction memory circuit (21) produce a page-over instruction addressed by the page-over real instruction address.

REFERENCES:
patent: 4218743 (1980-08-01), Hoffman et al.
patent: 4498146 (1985-02-01), Martinez
patent: 4594659 (1986-06-01), Guenthner et al.
patent: 4680700 (1987-07-01), Hester et al.
patent: 4691277 (1987-09-01), Kronstadt et al.
patent: 4757438 (1988-07-01), Thatte et al.
patent: 4797810 (1989-01-01), McEntee et al.

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