Instruction prefetching circuit with a next physical address pre

Details Instruction prefetching circuit with a next physical address pre Instruction prefetching circuit with a next physical address pre

1992-12-23

1995-01-31

Lall, Parshotam S.

Boots, shoes, and leggings

395400, 395250, 364DIG1, 364DIG2, 3642631, 3642551, 3642565, 364948, 364955, G06F 926, G06F 932, G06F 1210

Patent

active

053865219

ABSTRACT:
After a logical page number is stored, upon execution of a branch instruction, into a logical page number section in an effective address register, an address converting buffer is retrieved in accordance with a value obtained by addition of "1" to a logical page number of an instruction being executed at present, and a physical page number for a page-over is stored into a page-over address register. Thereafter, when a page-over occurs, the output of the page-over address register is selected by a physical page number selecting circuit and stored into the physical page number section in the instruction address register.

REFERENCES:
patent: 4847748 (1989-07-01), Yamahata et al.

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