Instruction prefetch system for conditional branch instruction f

Details Instruction prefetch system for conditional branch instruction f Instruction prefetch system for conditional branch instruction f

1984-05-21

1988-05-03

Williams, Jr., Archie E.

Boots, shoes, and leggings

G06F 942

Patent

active

047424516

ABSTRACT:
A central processor unit for a digital data processing system that processes prefetched instructions including a conditional branch instruction. The processor includes a fetch unit that has separate portions, one that retrieves operands and the other that retrieves instructions. When the fetch unit fetches a conditional branch instruction, it may continue to prefetch "branch not taken" instructions using the instruction fetch portion. The fetch unit initially uses the operand fetch portion to prefetch "branch taken" instructions. If it is determined that the branch is not taken, the prefetch operation is aborted, otherwise the prefetch operation is allowed to continue to provide the next instruction used by the processor.

REFERENCES:
patent: 4200927 (1980-04-01), Hughes
patent: 4236206 (1980-11-01), Strecker
patent: 4384342 (1983-05-01), Imura et al.
patent: 4430708 (1984-02-01), Isaman
patent: 4435756 (1984-03-01), Potash
patent: 4439827 (1984-03-01), Wilkes
patent: 4454578 (1984-06-01), Matsumoto et al.
patent: 4471433 (1984-09-01), Matsumoto

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