Instruction cache buffer with program-flow control

Details Instruction cache buffer with program-flow control Instruction cache buffer with program-flow control

1992-07-07

1993-10-26

Chan, Eddie P.

Boots, shoes, and leggings

364DIG1, 3642434, 36424341, 36424343, 3642443, 395250, G06F 1300

Patent

active

052573591

ABSTRACT:
A memory buffer for buffering data from an external memory to a processor including a cache memory, a first-in-first-out memory, a direct data path, a writing selector for writing data from the external memory to one of the cache memory, first-in-first-out memory and direct data path, a reading selector for reading data from one of the cache memory, first-in-first-out memory and direct data path and a controller for controlling the writing and reading selectors in response to the occurrence of certain conditions.

REFERENCES:
patent: 3938097 (1976-02-01), Niguette, III
patent: 4571674 (1986-02-01), Hartung
patent: 4654778 (1987-03-01), Chiesa et al.
patent: 4905196 (1990-02-01), Kirrmann
patent: 4918597 (1990-04-01), Krishnan et al.
patent: 4949252 (1990-08-01), Hauge

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