Instruction buffer system for switching execution of current ins

Details Instruction buffer system for switching execution of current ins Instruction buffer system for switching execution of current ins

1989-02-08

1993-03-23

Lee, Thomas C.

Boots, shoes, and leggings

3642463, 3642613, 3642624, 3642631, 364DIG1, G06F 938

Patent

active

051971313

ABSTRACT:
In an information processing system having an instruction buffer, an instruction buffer is controlled to primarily increase the instruction hit ratio of a sequence of instructions including a procedure-call instruction. In the first configuration, there is provided a mechanism which subdivides the instruction buffer into a plurality of instruction buffer banks so as to switch the instruction buffer bank to a current use in association with a dynamic procedure call, thereby improving the instruction hit ratio in the procedure call and in the return operation. In the second configuration, there are provided instruction words to subdivide and to control the instruction buffer such that the user can specify a method of controlling the instruction buffer. An instruction loop is captured efficiently and an arbitrary instruction sequence of a program is stored as a resident routine in the buffer so as to increase the instruction hit ratio.

REFERENCES:
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patent: 4561052 (1985-12-01), Tateno
patent: 4755935 (1988-07-01), Davis et al.
patent: 4953121 (1990-08-01), Muller
patent: 4974154 (1990-11-01), Matsuo
K. Sugashima et al. "Denshikeisanki no Hoshiki Sekkei" (Computer System Design), pp. 150-159, Computer Course 4, published by Sangyo Shuppan.

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