Instruction buffer for a digital data processing system

Details Instruction buffer for a digital data processing system Instruction buffer for a digital data processing system

1984-03-02

1987-09-01

Williams, Jr., Archie E.

Boots, shoes, and leggings

G06F 1208

Patent

active

046912797

ABSTRACT:
A method and a means of increasing the performance of an instruction buffer in a digital data processing system is disclosed. The improvement is accomplished by by-passing the content addressable memory operation which has heretofore been utilized to access page addresses in the instruction buffer. As each word included on the same page was accessed, the CAM was repetitiously activated even though it was accessing the same page. In the present system, word accesses made to the same page are handled in a much improved manner. In the present system, a comparator is implemented in the system which compares the presently reference page with the previously referenced word, so that when a match is noted, i.e., the same page is indicated, the CAM is bypassed and successive requests made to the same page are satisfied from the instruction buffer by a validity designator which designates that the presently referenced word is the correct one.

REFERENCES:
patent: 3828316 (1974-08-01), Card et al.
patent: 4276609 (1981-06-01), Patel
patent: 4381541 (1983-04-01), Baumann, Jr.
patent: 4407016 (1983-09-01), Bayliss

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