Instruction address calculation unit for a microprocessor

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G06F 1338

Patent

active

046987479

ABSTRACT:
An execution unit for a microprocessor comprising a first section for performing arithmetic and logic operations on data, a second section for performing arithmetic operations on data memory addresses, and a third section for performing arithmetic operations on instruction addresses is disclosed in which data addresses and instruction addresses may be simultaneously calculated.

REFERENCES:
patent: 4342078 (1982-07-01), Tredennick et al.

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