Instantaneous fault detection circuit method and apparatus

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor

Reexamination Certificate

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Details

C361S093100, C361S093600

Reexamination Certificate

active

06545849

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to electronic trip units for circuit breakers and more particularly to electronic trip units providing instantaneous fault detection for circuit breakers.
Electronic trip units are well known. Electronic trip units typically comprise voltage and current sensors that provide analog signals indicative of the power line signals. The analog signals are converted by an A/D (analog/digital) converter to digital signals which are processed by a microcontroller. The trip unit further includes RAM (random access memory), ROM (read only memory) and EEPROM (electronic erasable programmable read only memory) all of which interface with the microcontroller. The ROM includes trip unit application code, e.g., main functionality firmware, including initializing parameters, and boot code. The EEPROM includes operational parameters for the application code.
These trip units are required to meet certain standards, e.g., UL/ANSI/IEC, which define trip time curves specifying under what conditions a trip must occur, i.e., short time, long time, instantaneous, or ground fault, all of which are well known. These standards also specify a short time delay from the instant power is applied to when a trip unit must be ready to trip.
The present invention is being directed to the instantaneous trip condition. Various electronic circuits (analog electronics) and customized integrated circuits (application specific integrated circuit (ASIC)) have been employed to perform instantaneous protection. Conventional low voltage electronic trip units have used a simple comparison to detect instantaneous trip conditions. This type of circuit compares the instantaneous current with a fixed threshold, and upon attainment of that threshold the electronic trip unit will trigger the breaker to open. Due to well-known load transients such as motor inrush, this approach almost always overprotects and results in nuisance tripping.
Further, because of a transient phenomenon known as asymmetry, the first half-cycle can theoretically appear to reach two times the motor inrush current, or sixteen times the normal operational current. Nonetheless, various industry standards and code requirements determine instantaneous set points at which level the breaker is required to trip.
Under conditions of asymmetry, the actual peak current that occurs is a function of the closing angle and impedance (X/R) of the line/load combination. Asymmetry also may occur in fault transients. For example a fault of ten times the rated current for a circuit breaker can theoretically appear to be twenty times the rated current for a particular half cycle. Light impedance (X/R) again limits this theoretical maximum to 1.7 to 1.9 times the steady state current. As such, using the conventional electronic comparison approach, in a feeder breaker system, both breakers will trip rather than only the breaker closest to the load. This problem may be alleviated by employing a peak-to-peak current comparison.
Peak-to-peak current comparisons are known in the field of protective relays for protection of high voltage loads. For example, protection relays sold by General Electric Company as model numbers DFP-100, DFP-200 and F30 employ algorithms using peak-to-peak current values. However, such protective relays are generally standalone or rack mounted devices installed physically separate from the circuit breaker. Furthermore, by virtue of being installed separately, they are generally not self-powered and are energized prior to the breaker or load being energized. Consequently, the protective relay begins sampling prior to breaker closing and properly records zero current as the level prior to current flow. With electronic trip units, this generally does not occur, because when the breaker is closed, current generally flows simultaneously to the load and to the electronic trip unit. The present invention provides a method and apparatus for protecting the load from instantaneous, or bolted, current overloads based on peak-to-peak current values for this simultaneous current flow while minimizing the existing problem nuisance tripping due to load transients.
SUMMARY OF THE INVENTION
The above-discussed and other drawbacks and deficiencies of the prior art are overcome or alleviated by the method and apparatus of the present invention. The algorithmic approach provides protection to electrical systems by detecting true electrical spikes, and further by accurately determining when current overloads are present.
The electronic trip unit of the present invention is particularly well suited for use in a selective breaker system. The selective system may comprise, for example, a current source, an upstream circuit breaker and trip unit, a plurality of downstream circuit breakers and trip units and corresponding loads. The downstream circuit breakers and trip units are rated to meet the demands of the corresponding loads and are said to trip at lower peaks as compared to the upstream circuit breakers and trip units. The circuit breaker trip unit includes a current transformer providing an input current to a rectifying means, whereupon said input currents are detected for a certain polarity and converted to a low level voltage signal for processing. The low-level voltage signals are then processed via a signal processor where the signals are acted upon by a series of algorithms. In one embodiment, the processing means comprises an analog-to-digital converter and a microprocessor. If certain conditions of the algorithms are met, communications with an actuator by, for example, an output signal will energize a trip solenoid, which will cause the contacts of the breaker device to open.
In a preferred embodiment, the algorithmic arrangement is a set of algorithms, which can be briefly described by the following two-step sequences:
Step 1: Compare the absolute value of the current signal with a value equal to two multiplied by the square root of two multiplied by the instantaneous set point; if the current value is greater for N consecutive samples, trip the circuit breaker; if not, proceed to Step 2;
Step 2: Obtain the values of the peak-to-peak current and compare to a value equal to two multiplied by the square root of two multiplied by the RMS instantaneous set point; if the peak-to-peak current is greater, trip the circuit breaker; if not, return to Step 1.
The above-discussed and other features and advantages of the present invention will be appreciated and understood by those skilled in the art from the detailed description and drawings that follow.


REFERENCES:
patent: 4377836 (1983-03-01), Elms et al.
patent: 4443854 (1984-04-01), Pflanz et al.
patent: 4597025 (1986-06-01), Rutchik et al.
patent: 4717985 (1988-01-01), Demeyer
patent: 5136459 (1992-08-01), Fararooy
patent: 5963406 (1999-10-01), Neiger et al.

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