Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
1999-09-03
2003-08-26
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S121000, C700S175000
Reexamination Certificate
active
06611728
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an inspection system applied to a production line of electronic devices, etc., and a method for manufacturing electronic devices using such an inspection system.
More particularly, the present invention relates to an inspection system for inspecting electronic devices, which is enhanced for effective obtainment of inspection data and improvement of data analysis speed by making it easy to select and extract wafers to be inspected and analyzed, and for a method for manufacturing electronic devices, etc. using such an inspection system.
Electronic devices such as semiconductor devices are formed through repetitive treatments of wafers, which includes a plurality of processes such as photolithography, etching, etc. On the other hand, wafers treated in a predetermined process among a plurality of such manufacturing processes are inspected as needed by a particle inspection machine, a visual inspection machine, etc., and then particle information and improper shape information as to positions, sizes, quantities, types, etc. are collected. Hereafter, particle information to be detected by a particle inspection machine and improper shape information to be detected by a visual inspection machine will both be referred to as defect information generically.
As described in a monthly publication “Semiconductor World” (August, 1996, pp. 88, 99 and 102), inspection results have been transmitted from an inspection machine to an analysis unit through a network. And, the analysis unit can output any kind of analysis picture as needed, such as a trend of the total number of defects, a vertical bar graph (stack chart) for displaying the detected defect count in each defect-detected process, and/or a chart of correlation between defect count and yield, wherein the yield is calculated by using inspection results of electrical characteristics.
By using such analysis pictures, analyzers have checked and analyzed whether or not the defect count exceeds a predetermined standard, whether or not there is any abnormal defect-detected process, and whether or not there is any unique distribution of defects, and have tracked a source of various problems by using the analysis result. After that, analyzers have identified a defect-detected process and/or manufacturing equipment. Then they have tried to improve these processes and/or the manufacturing equipment to ramp up yield.
Conventionally, an object wafer, lot, or section between processes to analyze has been identified just subjectively by such analyzers, and then the identified object has been analyzed as described above.
BRIEF SUMMARY OF THE INVENTION
If desired, electrical characteristics (e.g., product functional tests) of electronic devices such as semiconductor devices can be inspected for all of the wafers in a production line (100%) being processed. However, practically, defect inspections inspected by particle inspection machines or visual inspection machines are not performed on all of the wafers and are not performed in every process in order to keep the through-put of a production line up to a predetermined level.
Generally, these defect inspections are performed on some desired wafers which are processed in a desired process. Consequently, if analyzers select desired wafers and/or processes just on the basis of their subjectivity for making the above-discussed analysis pictures, they are likely to select wrong wafers that are not inspected in the desired process. If analyzers select these wrong wafers, the above-discussed analysis pictures such as trend charts and stack charts for the total number of defects cannot be calculated. Furthermore, if a selected wafer has many peculiar defects such as a cluster which is mainly caused by bad condition of the manufacturing equipment, an analysis result on the basis on these peculiar defects cannot be accepted as an analysis result of the real average capability of the manufacturing line.
For example, when yield loss impacts caused by defects are analyzed, a correlation between the defects generated in each process and the pass/fail(electrical characteristics) state of each chip on a completed wafer must be taken. In this case, the object wafers are required to be inspected in many processes, to not have any cluster data which causes analytical errors and to have a comparatively high yield to establish a correlation with defects and yield.
And furthermore, it will be very effective to make a comparison between detailed electrical characteristics (e.g., a memory fail bit map data) and a defect inspection result in order to identify a process which causes failure chips. Since this inspection process of detailed electrical characteristics is performed after an object wafer is finished, in this case, one needs to identify which wafers have been inspected consistently in the manufacturing processes.
In the case of the conventional analyzing system, however, an object wafer to be analyzed has been selected only by the subjectivity of the analyzer. Consequently, an analyzer needs to repeat selection of wafers many times until the suitable one is selected. For example, this selection might have to be repeated until a wafer that has no dense defects (cluster) appears. For that reason, the conventional analyzing system needs to spend a longer analyzing time, thereby delaying feedback of the analysis result to the manufacturing process. In addition, it is not certain whether or not the selected wafer is really a suitable one for the analysis.
In addition, even when a specific defect position is selected from data obtained in an analysis unit and observed to capture its image, it is not easy to retrieve past detected information of the wafer. It has thus been impossible to select newly found defects or defects for which images were already captured in previous processes.
When wafers are enlarged in diameter, for example, to 300&phgr;, the amount of data to be treated in the inspection process will be increased. As a result, the preparation time for analysis/inspection time will further increase.
Under such circumstances, it is an object of the present invention to make it easier to select an object wafer to be analyzed or inspected, thereby shortening the analyzing time or time for obtaining inspection data effectively.
In addition, in many conventional analyzing systems, such inspection data are retrieved and computed from a database when a user analyzes the inspection data. Some conventional analyzing systems can compute such inspection data before receiving an instruction from a user, however such systems can compute only respective analytic operations independently. Consequently, if an analysis is to be made by freely combining all the information items related to defects on a wafer, a processing time must be taken into account for each of searching and computing operations separately. As a result, a long preparation time is needed for each of such searching and computing operations. This is why it usually takes much time to feed back analyzed data to an object manufacturing process.
Under such circumstances, it is an object of the present invention to provide a system for inspecting electronic devices and a method for manufacturing electronic devices using such a system, which are enhanced for reduction of analyzing time and improvement of analyzing accuracy by solving the conventional problems and making it easier to use a large amount of defect inspection data thereby to shorten the preparing time for analysis.
In order to achieve the above object, an inspection system is provided which includes an inspection machine for inspecting a work which is processed in one of a plurality of manufacturing processes of a manufacturing line and an analysis system for outputting an inspection history list obtained by making calculations from the inspected result. The inspection history list shows a matrix of first information as to the inspection processes in which the work is inspected or the manufacturing processes corresponding to the inspection processe
Ikeda Yoko
Iwata Hisafumi
Konishi Junko
Morioka Natsuyo
Nemoto Kazunori
Bahta Kidest
Picard Leo
LandOfFree
Inspection system and method for manufacturing electronic... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Inspection system and method for manufacturing electronic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Inspection system and method for manufacturing electronic... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3116013