Inspection plan optimization based on layout attributes and...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Quality evaluation

Reexamination Certificate

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C702S057000, C702S117000, C702S124000

Reexamination Certificate

active

07739065

ABSTRACT:
Methods for determining customized defect detection inspection plans are provided. One method includes fabricating a test chip and generating test chip data from the fabricated test chip. Then, defining systematic signatures from the generated test chip data and identifying a yield relevant systematic signature from the defined systematic signatures. The method includes identifying a layout pattern associated with the yield relevant systematic signature and locating the identified layout pattern on a process module layer of a product chip. Further, the method includes defining a customized defect detection inspection or metrology methodology for detecting systematic defects on the process module layer based on the identified layout pattern associated with the yield relevant systematic signature.

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