Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2001-06-29
2004-07-06
Deb, Anjan K. (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S755090, C345S904000
Reexamination Certificate
active
06759867
ABSTRACT:
This application claims the benefit of Korean Application No. P2000-86921 filed on Dec. 30, 2000, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a liquid crystal display, and more particularly to an inspection apparatus for a liquid crystal display that is capable of inspecting more than six panels patterned on a single substrate of glass.
2. Description of the Related Art
Generally, a liquid crystal display (LCD) has an active matrix driving system using thin film transistors (TFT's) as switching devices to display a naturally moving picture without blur. Such a LCD, thinner in size than the existent cathode ray tube displays, has been widely used as a monitor for a personal computer or a notebook computer, as well as, office automation equipment, such as a copy machine, etc., and portable equipment, such as a cellular phone, pager, etc.
A method of fabricating such an active matrix LCD is comprised of substrate cleaning, substrate patterning, aligning film formation, substrate adhesion/liquid crystal injection, packaging and testing processes.
In the process of substrate cleaning, a cleaner removes foreign substances from the substrates before and after patterning of the upper and lower substrates of the LCD.
The substrate patterning process is divided into a step of patterning the upper substrate and a step of patterning the lower substrate. The upper substrate is provided with color filters, a common electrode and a black matrix. The lower substrate is provided with signal wires, such as data lines and gate lines. A thin film transistor (TFT) is arranged at an intersection between the data lines and the gate lines for each pixel area. A pixel electrode is formed at each pixel area between the data lines and the gate lines. A data line is connected to a source electrode of the TFT in each pixel area.
In the substrate adhesion/liquid crystal injection process, a step of coating an aligning film on the lower substrate and rubbing it is sequentially followed by a step of adhering the upper substrate to the lower substrate, a liquid crystal injection step and an injection hole sealing step. Thereafter, a polarizer is attached to each side of the upper and lower substrates to complete a liquid crystal display panel. Subsequently, a final inspection process on the completed liquid crystal display panel is carried out.
The final inspection process includes a pixel cell defect inspection in which a test pattern is displayed on a screen of the completed liquid crystal display panel to detect the presence or absence of a bad pixel, and an eye inspection for viewing other defects, such as a stain, foreign material or a scratch, etc. During the pixel cell defect inspection, a light is irradiated onto an active array of the LCD panel. While the panel is irradiated with a light, a voltage is applied to a pixel of the LCD to inspect for electrical defects in the completed LCD panel.
FIG. 1
is a perspective view showing a structure of a conventional inspection apparatus for a liquid crystal display device for inspecting a pixel cell defect of a completed LCD panel.
Referring to
FIG. 1
, an inspection apparatus
100
for a liquid crystal display device includes a chuck
2
loaded with a glass substrate (not shown), a probe frame
110
for applying a pattern signal to LCD panels (not shown) on the glass substrate, and an electro-optic modulator
90
for irradiating a light onto LCD panels (not shown) on the glass.
The glass substrate is safely loaded on the chuck
2
with the aid of a robot arm (not shown). The glass is provided with four LCD panels (not shown) each having the same resolution of pixel cells and a shorting bar (not shown) located at one side of each LCD panel to receive a pattern signal from the exterior for the purpose of inspecting pixel cell defects. A LCD panel is cut from the shorting bar by means of a cutter after the pixel cell defect inspection is done.
FIG. 2
is a plan view showing a structure of a conventional probe frame
110
that is capable of inspecting a single glass substrate
4
on which four LCD panels
5
are provided.
Referring to
FIG. 2
, the probe frame
110
includes a probe frame body
6
, a multiplex board
8
formed integrally at one side of the probe frame body
6
, and four probe frame contact pins
24
provided at the inner side of the probe frame body
6
to be connected in correspondence with shorting bars (not shown) of the LCD panels
5
.
The probe frame body
6
is formed of a black jig in which an oxide film is grown on an aluminum (Al) film. The probe frame body
6
further includes four vacuum pads
22
installed at the corners thereof such that they allow the probe frame
110
to be drawn to or released from the chuck
2
with a varying state of vacuum. These vacuum pads
22
cause the probe frame
110
to descend onto the chuck
2
. The vacuum pads
22
release and raise the probe frame
110
from the chuck
2
when the glass substrate
4
is to be unloaded. The multiplex board
8
frequency divides a pattern signal supplied to the corresponding panel for defect inspection of a pixel cell.
Referring to
FIG. 3
, the multiplex board
8
includes a multiplex driver integrated circuit (IC)
12
for frequency-dividing an applied signal into five pattern signals, a pogo pin set
14
for supplying a signal to the multiplex driver
12
, a relay driver IC for relaying the frequency-divided pattern signal to twelve channels, and a contact pin connector
16
for applying an output signal of the relay driver to a corresponding LCD panel
5
.
The pogo pin set
14
receives a signal generated from a pattern modulator (not shown) and delivers it to the multiplex driver IC
12
.
Referring to
FIG. 4
, the pogo pin set consists of a driving pin
10
and a sensing pin
11
for each signal.
A driving pin
10
delivers a signal from the exterior to the multiplex board
8
. The sensing pin
11
is responsible for detecting whether or not the respective driving pin
10
has been inserted into a pogo pin contact
30
and electrically connected thereto. The pogo pin contact
30
is arranged at the upper surface of the chuck
2
for the pogo pins
14
to insert into. The pogo pin contacts
30
are in the shape of a hole, and consist of a driving hole
31
and a sensing hole
32
for each signal.
Each of the driving holes
31
is connected to an external pattern modulator. Each of the driving pins
10
of the pogo pin set
14
are inserted into a driving holes
31
. In order to correct a contact error when the pogo pin set
14
is connected to the pogo pin contact
30
, the probe frame body
6
is provided with an adjust nut/hole (not shown). The adjust nut allows a user to directly adjust the position of a sensing pin
11
until a detection signal from the sensing hole
32
is generated, thereby enabling complete electrical connection of the pogo pin set
14
to the pogo pin contact
30
.
The multiplex driver IC
12
frequency-divides a signal applied from the pogo pin set
14
into five pattern signals D
1
, D
2
, D
3
, G
1
and G
2
and a ground signal GND and applies the same to the relay driver IC. The relay driver IC relays a signal applied from the multiplex driver
12
and converts the relayed signal into 12 channels CH
4
to CH
15
of the pattern signals D
1
, D
2
, D
3
, G
1
and G
2
, and the ground signal GND.
The pattern signal output from the multiplex board
8
uses a ‘2G2D’ mode or a ‘2G3D’ mode. Herein, the ‘2G2D’ mode is a case of using the second gate signal G
2
, the first gate signal G
1
, the second data signal D
2
and the first data signal D
1
as pattern signals of the gate signal and the data signal while the ‘2G3D’ mode is a case of using the first gate signal G
1
, the second gate signal G
2
, the first data signal D
1
, the second data signal D
2
and the third data signal D
3
.
The contact pin connector
16
is connected to the 12 channels of the relay driver IC to deliver the pattern signal and the ground signal into each of the four probe frame c
Deb Anjan K.
L. G. Philips LCD., Ltd.
Morgan & Lewis & Bockius, LLP
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