Inserting decoder reconfiguration instruction for routine...

Electrical computers and digital processing systems: processing – Instruction decoding

Reexamination Certificate

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C713S320000

Reexamination Certificate

active

11304818

ABSTRACT:
An information processing method for coding a program to enable an information processing device having an instruction decoder having a reconfigurable circuit, comprises the steps of: simulating execution of the program to obtain a history of instructions executed; extracting a routine in which a number of types of codes used in at least a field among fields constituting an instruction is limited to a predetermined number or less, from the program based on the history; inserting an instruction for changing circuit configuration of the reconfigurable circuit at start and end of the routine; allocating codes so that number of times of change of bit values in a field in which the number of types of codes used are limited is reduced for the routine; and converting a program obtained in the step of inserting an instruction to codes according to the allocation for the routine.

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“Full 24-bit Digital Signal Processor”, MN 1920 Series LSI Manual, Matsushita Electronics Corporation 3 pages, unknown date.

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