Electricity: electrical systems and devices – Safety and protection of systems and devices – Impedance insertion
Reexamination Certificate
2002-10-23
2004-05-11
Patel, Rajnikant B (Department: 2838)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Impedance insertion
C323S908000, C323S299000
Reexamination Certificate
active
06735064
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to an inrush current suppressing device, and more particularly, to an inrush current suppressing device capable of suppressing occurrence of inrush current.
(2) Description of the Related Art
A power supply unit has a large-capacitance smoothing capacitor arranged on an input side thereof in order to generate a direct-current voltage with less pulsating component. Such an input capacitor has charge close to 0 (zero) in an initial state, and when the power supply switch is turned ON, therefore, large charging current flows instantaneously (such current is called inrush current).
The inrush current problem also arises in the case of a package of hot-line insertable/removable type (package which can be inserted into and removed from the casing of other equipment for the expansion of lines, maintenance of the equipment, etc. without disconnecting the power supply).
For example, when a package having a power supply circuit, such as a DC/DC or AC/DC converter, incorporated therein is inserted into the casing of other equipment to which electric power is being supplied, inrush current flows to the package.
If excessive inrush current is caused, a current exceeding the rated current flows through the power supply line, possibly damaging circuit elements or connectors. During a short time period after the start of power supply, therefore, the inrush current needs to be suppressed. In conventional inrush current suppressor circuits, the switching function of a transistor is utilized to suppress the peak value of inrush current caused at the start of power supply.
However, the performance of such conventional inrush current suppressor circuits depends upon the characteristic of the transistor used. Accordingly, a phenomenon occurs that the power supply circuit such as a DC/DC converter repeatedly starts and stops its operation before the transistor reaches a completely turned-ON state, with the result that the circuit operation fails to stabilize for a certain period of time after the start of power supply, lowering the reliability and quality of the device.
There has also been proposed a technique (e.g. in Japanese Patent No. 3119254) in which a constant-current circuit is provided for the detection of input current and feedback control is carried out to suppress the inrush current. This technique, however, takes no account of the relation between the operating current of a protective element for protecting the power supply circuit and the constant current to be set, and also no measures are taken to prevent a sudden rise of the inrush current at the start of power supply.
SUMMARY OF THE INVENTION
The present invention was created in view of the above circumstances, and an object thereof is to provide an inrush current suppressing device capable of stabilizing inrush current suppression control to thereby improve the reliability and quality of the control.
To achieve the object, there is provided an inrush current suppressing device for suppressing occurrence of inrush current. The inrush current suppressing device comprises a current limiting element for limiting an input current flowing to a power supply circuit in accordance with an input current limit value, a current detecting section for detecting the input current flowing through the current limiting element and converting the detected current to a voltage signal, a sloping voltage signal generating section for generating a sloping voltage signal proportional to a time elapsed after start of power supply, and an input current limiting section for comparing the voltage signal with the sloping voltage signal, and for outputting the input current limit value for suppressing the inrush current and also gradually increasing the input current limit value with rise in the sloping voltage signal during a period in which the voltage signal is higher in level than the sloping voltage signal after the start of power supply.
The above and other objects, features and advantages of the present invention will become apparent from the following description when taken in conjunction with the accompanying drawings which illustrate preferred embodiments of the present invention by way of example.
REFERENCES:
patent: 4442339 (1984-04-01), Mizuno et al.
patent: 5010293 (1991-04-01), Ellersick
patent: 5187653 (1993-02-01), Lorenz
patent: 5374887 (1994-12-01), Drobnik
patent: 5559660 (1996-09-01), Watson et al.
patent: 6185082 (2001-02-01), Yang
patent: 2000-175439 (2000-06-01), None
Katten Muchin Zavis & Rosenman
Patel Rajnikant B
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