Inrush current limiting circuit

Details Inrush current limiting circuit Inrush current limiting circuit

1989-11-20

1991-04-23

Wong, Peter S.

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

323908, 361 58, 361101, 361111, G05F 1573

Patent

active

050102931

ABSTRACT:
An inrush current limiting circuit in accordance with the principles of the present invention limits initial current flow to a highly initially reactive power load. The current limiting circuit comprises a plug in connection to a power source and two conductor paths leading from the plug in connection. A power FET has a source element to drain element path in series with one of the conductor paths and has a gate connection. A bipolar transistor is connected to shunt the gate element of the power FET to the potential at its source element when the bipolar transistor is conducting, thereby to limit the current passing through the power FET. A sense resistor is in series with one of the conductor paths for controlling a base element of the bipolar transistor to cause it to conduct when current through the sense resistor exceeds a predetermined amount. The bias resistor is connected to the gate element of the power FET normally to bias it into full conduction between the source and drain elements when the bipolar transistor is not conducting.

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patent: 4809122 (1989-02-01), Fitzner

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