Multiplex communications – Wide area network – Packet switching
Patent
1994-09-30
1996-05-14
Hsu, Alpus
Multiplex communications
Wide area network
Packet switching
370 61, 370 655, 370 681, 370 942, 34082579, H04L 1254, H04Q 1104
Patent
active
055174965
ABSTRACT:
A queueing circuit serves an asynchronous switching circuit. A number of input circuits are connected to inputs of a switching network in a one-to-one relationship with the outputs of the switching matrix. During its own time slot, each of the input circuit has a series of availability signals which are assigned to time slots that are later than the input circuit's own time slot. These availability signals indicate the availability condition at the matrix output for enabling an emission of a data cell during the time slot identified by the availability signal. Based upon the availability signal, the cell is released from a memory storage during an available one of the later time slots.
REFERENCES:
patent: 4884264 (1989-11-01), Servel et al.
patent: 4980885 (1990-12-01), Servel et al.
patent: 5168492 (1992-12-01), Beshai et al.
patent: 5179552 (1993-01-01), Chao
patent: 5287346 (1994-02-01), Bianchini, Jr. et al.
Boyer Pierre
Coudreuse Jean-Pierre
Servel Michel
France Telecom
Hsu Alpus
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