Input switching device used in a logic MOS integrated circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307468, H03K 19177

Patent

active

050178105

ABSTRACT:
A first input signal is supplied to a register and stored therein. The first input signal and data stored in the register are supplied to a first logic circuit. The first logic circuit is controlled by an output signal of a flag circuit and selects one of the first input signal and the data stored in the register. A second input signal is supplied to a second logic circuit. The second logic circuit is controlled by an output signal of the flag circuit and selects one of supplying the second input signal to the register as a clock signal and supplying the second input signal to a peripheral circuit as an input signal. The flag circuit supplies the second input signal to the register as the clock signal when the first logic circuit selects the output signal of the register, and supplies the second input signal to the peripheral circuit as the input signal when the first logic circuit selects the first input signal.

REFERENCES:
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patent: 4763020 (1988-08-01), Takata et al.
patent: 4789951 (1988-12-01), Birkner et al.
patent: 4835414 (1989-05-01), Freidin
patent: 4857775 (1989-08-01), Obata et al.
patent: 4879481 (1989-11-01), Pathak et al.
patent: 4933577 (1990-06-01), Wong et al.
patent: 4970410 (1990-11-01), Matsushita et al.
Signetics PLD data manual, chapter 3, PLC 16v8 Series Erasable and OTP PAL-type Device, Jun. 22, 1988.

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