Input surge protection device using JFET

Details Input surge protection device using JFET Input surge protection device using JFET

2008-10-31

2011-11-29

Patel, Dharti (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific voltage responsive fault sensor

C361S056000, C361S091100

Reexamination Certificate

active

08068321

ABSTRACT:
An input surge suppression device and method that uses a simple JFET structure. The JFET has its gate clamped to a predetermined value, its the drain receives the input voltage from an input power source, its source is connected to the input of a down-stream device, and a resistor connected between the drain and the gate or between the source and the gate. Thus, when the drain voltage approximates the clamped gate voltage, the source voltage nearly equals the drain voltage. When the drain voltage rises above the clamped gate voltage, the source voltage is lower than the drain voltage. The downstream device may be a DC-DC converter and the gate is biased by the enable (EN) pin of a DC-DC converter.

REFERENCES:
patent: RE33807 (1992-01-01), Abel et al.
patent: 2008/0007304 (2008-01-01), Yang
patent: 2008/0308838 (2008-12-01), McNutt et al.
patent: 2010/0110595 (2010-05-01), Yang et al.

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