Input protective circuit for semiconductor device

Details Input protective circuit for semiconductor device Input protective circuit for semiconductor device

1981-05-07

1984-06-26

Salce, Patrick R.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, 361111, 357 2313, 307200B, 307304, H02H 320

Patent

active

044569394

ABSTRACT:
An input protective circuit of MIS type device is used by applying reverse bias voltage to a semiconductor substrate and a variable-conductivity element is connected between the input terminal of the MIS type device and the ground so that the input terminal is in conductive state to the ground when the reverse bias voltage is not applied to the semiconductor substrate and the input terminal is in non-conductive state to the ground when the reverse bias voltage is applied to the semiconductor substrate.

REFERENCES:
patent: 3360736 (1967-12-01), Nagata
patent: 3403270 (1968-09-01), Pace et al.
patent: 3445924 (1969-05-01), Cheroff et al.
patent: 3470390 (1969-09-01), Lin
patent: 3636385 (1972-01-01), Koepp
patent: 3777216 (1973-12-01), Armstrong
patent: 3917964 (1975-11-01), Carlson
patent: 4204131 (1980-05-01), Dozier
patent: 4288829 (1981-09-01), Tango
Patents Abstracts of Japan, vol. 4, No. 112, Aug. 12, 1980, p. 93E21 & Japanese Pat. -A-55 70071, (Mitsubishi Denki K. K.).
Patents Abstracts of Japan, vol. 4, No. 5, Jan. 16, 1980, p. 133E165 & Japanese Pat. -A-54 146975, (Nippon Denki K. K.).

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