Input protection device for insulated gate field effect transist

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 91, 361111, 307302, 307303, H02H 322

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active

042825563

ABSTRACT:
An input protection device comprising at least one pair of N and P type MOSFETs having their conduction paths series connected between a source of operating potential and the input of the circuit to be protected. Another variation includes a second pair of similarly connected N and P type MOSFETs with one pair connected between the input to be protected and the most negative source of operating potential while the second pair is connected between the most positive source of operating potential and the input to be protected.

REFERENCES:
patent: 3512058 (1970-05-01), Khajezadeh et al.
patent: 3712995 (1973-01-01), Steudel
patent: 3947727 (1976-03-01), Stewart
patent: 4037140 (1977-07-01), Eaton, Jr.
patent: 4131928 (1978-12-01), Davis et al.
"Fundamentals of COS/MOS Integrated Circuits", by Bishop et al; Apr. 1974, Solid State Technology-Magazine, pp. 85-89.

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