Input protection device for C-MOS device

Details Input protection device for C-MOS device Input protection device for C-MOS device

1983-09-02

1989-10-03

Hille, Rolf

357 42, 357 2313, H01L 2980, H01L 2978, H01L 2702

Patent

active

048720453

ABSTRACT:
An input protection device for a C-MOS device having an n-type semiconductor substrate and a p-type well region. The device comprises a diode consisting of the p-type well region and an n.sup.+ -type layer diffusion formed in the p-type well region and connected between a gate of a C-MOS FET and ground. The n.sup.+ -type layer of the diode has a higher impurity concentration and a greater diffusion depth than those of n.sup.+ -type layers formed in the p-type well region and constitute the source and drain of an n-channel MOSFET.

REFERENCES:
patent: 3667009 (1972-05-01), Rugg
"C-MOS/SOS LSI Input/Output Protection Network", (8/1978)--B. T. Ahlport et al.
"Gate Protection of MIS Devices"--M. Lenzlinger--(Apr. 1971).

Affiliated with

Also associated with

Rating

Input protection device for C-MOS device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Input protection device for C-MOS device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Input protection device for C-MOS device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-667524