Input protection circuit having load resistor implemented by p-c

Details Input protection circuit having load resistor implemented by p-c Input protection circuit having load resistor implemented by p-c

1996-02-09

1998-06-02

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327318, 257360, 257361, 361 56, 361 91, H02H 904

Patent

active

057606307

ABSTRACT:
An input protection circuit which protects a first-stage inverter circuit against an electrostatic surge. The input protection circuit includes n-channel MIS type punch-through transistor for discharging the electrostatic surge to a ground terminal and a p-channel MIS type load transistor coupled between a signal input pad and the n-channel MIS type punch-through transistor, the p-channel MIS type load transistor having a gate and a back-gate concurrently applied with the electrostatic surge so that a dielectric breakdown hardly takes place in a gate insulating film.

REFERENCES:
patent: 4449158 (1984-05-01), Taira
patent: 4858055 (1989-08-01), Okitaka
patent: 4937700 (1990-06-01), Iwahashi
patent: 5170241 (1992-12-01), Yoshimura et al.
patent: 5291051 (1994-03-01), Hoang et al.
patent: 5397934 (1995-03-01), Merrill et al.
patent: 5534723 (1996-07-01), Iwai et al.
patent: 5543734 (1996-08-01), Volk et al.
patent: 5545909 (1996-08-01), Williams et al.

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