Input process sequence controller

Details Input process sequence controller Input process sequence controller

1979-11-19

1982-06-01

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 300

Patent

active

043331432

ABSTRACT:
An input process sequence controller provides a sophisticated communication processing link between a central processor and peripheral digital apparatus. Data is transmitted from the peripheral digital apparatus to the process sequence controller whose function is to process that incoming data as commanded, to relieve the central processor of that task. The process sequence controller has a processor unit, controlled by a Read-only Memory for performing certain functions on the incoming data. The incoming data is received by one portion of a first swapping buffer while a second portion transmits previously received data to the processor unit. When the second portion is emptied, it begins receiving data while the first portion transmits data. A first portion of a second swapping buffer receives processed data from the processor unit while a second portion transmits processed data to the central processor. When the second portion is emptied, it begins receiving processed data while the first portion transmits its processed data. This procedure continues during an operation.

REFERENCES:
patent: 3344406 (1967-09-01), Vinal
patent: 3967250 (1976-06-01), Senda et al.

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