Boots – shoes – and leggings
Patent
1987-04-17
1989-04-11
Harkcom, Gary V.
Boots, shoes, and leggings
G06F 1516
Patent
active
048211702
ABSTRACT:
In a digital computer system which employs a plurality of host processors, at least two system buses and a plurality of peripheral input/output ports, an input/output system is provided whereby ownership of the input/output channels is shared. The device controller employs a first port controller having a first ownership latch, a second port controller having a second ownership latch, a first bus, a dedicated microprocessor having control over the first bus (the MPU bus), a second, higher-speed bus, a multiple-channel direct memory access (DMA) controller which is a state machine which controls the second bus (the data buffer bus), a bus switch for exchanging data between buses, a multiple device peripheral device interface, namely a Small Computer System Interface (SCSI), and at least provision for interface with data communication equipment (DCEs) or data terminal equipment (DTEs). The DMA controller arbitrates data bus usage and can allocate alternate bus clock cycles in response to requests to exchange data and is capable of supporting overlapping transfers. The microprocessor is allowed access to the data buffer bus only if the data buffer bus is not in use for data transfer. The latches associated with each port grant ownership to either port or both ports allowing data exchange between addressed peripheral devices and requesting ports.
REFERENCES:
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4480307 (1984-10-01), Budde et al.
patent: 4564900 (1986-01-01), Smitt
patent: 4590554 (1986-05-01), Glazer et al.
patent: 4654857 (1987-03-01), Samson et al.
Bernick David L.
Chan Kenneth K.
Chan Wing M.
Dan Yie-Fong
Hoang Duc M.
Harkcom Gary V.
Lynt C. H.
Tandem Computers Incorporated
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