Input/output protection device for use in semiconductor device

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361111, H02H 900

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active

057175594

ABSTRACT:
An input/output protection device for protecting an internal circuit of an integrated circuit formed on a P-type substrate, from an electrostatic discharge (ESD), includes a thyristor connected between a terminal connected to the internal circuit and a common wiring conductor. The protection device comprises a N-well formed in the P-type substrate, a first P-type diffused region formed in the N-well and connected to the terminal, a first N-diffused region formed to adjoin the first N-well, a second P-type diffused region formed in close proximity to the first N-type diffused region, and a second N-type diffused region formed in the P-type substrate and connected to the common wiring conductor. An external resistor is connected between the first P-type diffused region and the first N-type diffused region, and another external resistor is connected between the second P-type diffused region and the second N-type diffused region. A diode is constituted of the first N-diffused region and the second P-type diffused region in close proximity to each other, so that the diode has a low parasitic resistance. Thus, when a negative electrostatic pulse is applied to the terminal, the diode allows a forward current to flow from the common wiring conductor to the terminal through a low impedance path including the first resistor, the diode and the second resistor.

REFERENCES:
patent: 5274262 (1993-12-01), Avery
patent: 5572394 (1996-11-01), Ker et al.
patent: 5602404 (1997-02-01), Chen et al.
R.N. Rountree et al., "A Process-Tolerant Input Protection Circuit for Advanced CMOS Processes", 1988 EOS/ESD Symposium Proceedings, 1988, pp. 201-205 No Month.

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