Input/output macrocell for programmable logic device

Details Input/output macrocell for programmable logic device Input/output macrocell for programmable logic device

1991-08-08

1992-08-04

Laroche, Eugene R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307241, 328104, 328154, 36518908, G06F 700, H03K 19173, H03K 1920

Patent

active

051361884

ABSTRACT:
In a programmable logic device having a programmable logic array 15 adapted to receive a plurality of input signals and provide a plurality of output signals (product terms) through an AND logic which depend on the input signals and information stored in the logic array and a macrocell associated with the logic array, the macrocell including a first OR gate group 11 including a plurality of OR gates, each for ORing the predetermined number of the product terms from the logic array; a demultiplexor group 12 including a plurality of demultiplexors each coupled to output of the corresponding OR gate in the first OR gate group 11, each for generating two or more output signals per one input signal; a second OR gate group 13 including a plurality of OR gates each coupled to a corresponding one of outputs of each of the plurality of demultiplexors, each for ORing the corresponding outputs from the plurality of demultiplexors to form a sum data path for the product terms; and an input/output circuit 14 for receiving data from the plurality of sum data paths for the product terms provided by the plurality of OR gates in the second OR gate group 13 to transfer the received data to an output stage or feedback that to the logic array; whereby the plurality of sum data paths for the product terms are provided in one macrocell.

REFERENCES:
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patent: 4617479 (1986-10-01), Hartmann et al.
patent: 4845496 (1989-07-01), Dower et al.
patent: 4878200 (1989-10-01), Asghar et al.
patent: 4983959 (1991-01-01), Breuninger
patent: 5053647 (1991-10-01), Shizukuishi et al.
patent: 5055712 (1991-10-01), Hawley et al.

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