Boots – shoes – and leggings
Patent
1982-02-11
1985-07-09
Zache, Raulfe B.
Boots, shoes, and leggings
G06E 940
Patent
active
045286256
ABSTRACT:
A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows the alternative of off-chip program fetch in each instruction cycle, with the opcode returned by an external data bus. Data I/O instructions for access to peripherals or external data memory use two machine cycles so that the external ROM fetch is not distributed. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16.times.16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
REFERENCES:
patent: 3962682 (1976-06-01), Bennett
patent: 4041462 (1977-08-01), Davis et al.
patent: 4050058 (1977-09-01), Garlic
Magar Surendar S.
McDonough Kevin C.
Eng David Y.
Graham John G.
Texas Instruments Incorporated
Zache Raulfe B.
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