Communications: electrical – Digital comparator systems
Patent
1973-12-16
1976-02-10
Shaw, Gareth D.
Communications: electrical
Digital comparator systems
G06F 300, G06F 906
Patent
active
039380980
ABSTRACT:
A microprogrammable data processor comprising a generalized three-bus archictecture wherein the functional processing elements are connected between the busses by means of tri-state logic elements which allow the elements to selectively drive, receive from, or present a high impedance to the busses under control of a microprogram. The device includes an input-output system in which the input/output device may have access to all three busses, two for data and for address inputs and the third for receiving output data. The busses may be multifunction busses for carrying either data or address signals.
The device utilizes a single phase clock and performs operations in a highly parallel manner.
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Ralabate James J.
Sarli Anthony J.
Shaw Gareth D.
Thomas James D.
Weiss Franklyn C.
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