Input/output circuit with on-chip inductor to reduce...

Wave transmission lines and networks – Plural channel systems – Having branched circuits

Reexamination Certificate

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Details

C333S005000, C333S012000, C333S033000, C336S200000

Reexamination Certificate

active

07005939

ABSTRACT:
An I/O circuit disposed on an integrated circuit substrate and having reduced parasitic capacitance. The I/O circuit includes a signal line segmented into a first signal line segment and a second signal line segment, and an inductive structure disposed between the first and second signal line segments. An on-chip termination element is coupled to the first signal line segment, and an electrostatic discharge (ESD) element is coupled to the second signal line segment.

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