Input/output circuit of semiconductor integrated circuit

Details Input/output circuit of semiconductor integrated circuit Input/output circuit of semiconductor integrated circuit

2002-05-22

2004-11-02

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C327S318000, C327S321000, C327S328000

Reexamination Certificate

active

06812766

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an input/output circuit, and more particularly, to an input/output circuit of a field effect semiconductor integrated circuit, for inputting/outputting signals from/to the outside of the semiconductor integrated circuit.
With the recent high integration of semiconductor devices, high performance has been increasingly demanded in the technology of input/output circuits for inputting/outputting signals from/to the outside of the devices. In particular, while the voltage of external input/output signals remains at the conventional TTL level, the supply voltage internal to a semiconductor integrated circuit is required to be lower as the size of the semiconductor integrated circuit is made finer. In view of this, it is required to provide an input/output circuit capable of accepting a voltage higher than the supply voltage internal to a semiconductor integrated circuit. In realization of such an input/output circuit, a problem arises in a p-channel transistor of the output part of the input/output circuit. That is, in a normal configuration, the supply voltage is applied to an n-well region of the p-channel transistor of the output part. The drain of the p-channel transistor is a p-type diffusion region. Therefore, when a voltage higher than the supply voltage is applied to the drain, a forward bias is applied to the PN junction causing flow of a large current, and this may possibly destroy the semiconductor integrated circuit. Thus, a unique construction is necessary for an input/output circuit capable of accepting a voltage higher than the supply voltage internal to the semiconductor integrated circuit.
FIG. 11
illustrates an input/output circuit capable of accepting a voltage higher than the supply voltage internal to the semiconductor integrated circuit, as first related art. In
FIG. 11
, for simplification of description, only a p-channel transistor B
02
of an output part is shown, omitting an input part and an n-channel transistor of the output part. The p-channel transistor B
02
includes a source diffusion region B
02
a
, a gate B
02
b
, a drain diffusion region B
02
c
, an n-well diffusion region B
02
d
, a substrate B
02
e
and device isolators B
02
g
and B
02
h
. The input/output of signals into/from a semiconductor integrated circuit having the input/output circuit shown in
FIG. 11
is entirely performed via an input/output pad B
03
. The supply voltage VDD (V) is applied to the source diffusion region B
02
a
. Therefore, in the initial state, the voltage at the n-well diffusion region B
02
d
is as high as VDD (V) due to the PN junction with the source diffusion region B
02
a.
The operation of the input/output circuit with the above configuration is as follows. Herein, the case that a voltage is applied from outside when the input/output circuit is in the input state is described. When an input at a voltage VH (V) higher than the supply voltage is applied to the input/output pad B
03
, the potential at the n-well diffusion region B
02
d
rises to as high as VH (V) due to the PN junction with the drain diffusion region B
02
c
. A current flows into the input/output pad B
03
during the charging of the n-well diffusion region B
02
d
to VH (V). However, the current flow stops once the voltage at the n-well diffusion region B
02
d
reaches VH (V). Also, at this time, a reverse voltage is applied to the PN junction between the n-well diffusion region B
02
d
and the source diffusion region B
02
a
. Therefore, no large current will flow between the n-well diffusion region B
02
d
and the source diffusion region B
02
a
. Accordingly, using the input/output circuit shown in
FIG. 11
, the semiconductor integrated circuit is prevented from destruction even when a voltage higher than the supply voltage internal to the semiconductor integrated circuit is input into the semiconductor integrated circuit.
The input/output circuit shown in
FIG. 11
does not accept a voltage lower than the ground voltage due to the existence of the n-channel transistor (not shown) of the output part. An input/output circuit capable of accepting a voltage lower than the ground voltage is realized by a diffusion method separating a p-well.
FIG. 12
illustrates a conventional input/output circuit capable of accepting a voltage lower than the ground voltage, as second related art. In
FIG. 12
, for simplification of description, only an n-channel transistor C
02
of an output part is shown, omitting an input part and a p-channel transistor of the output part. The n-channel transistor C
02
includes a source diffusion region C
02
a
, a gate C
02
b
, a drain diffusion region C
02
c
, a p-well diffusion region C
02
d
, a substrate C
02
e
and device isolators C
02
g
and C
02
h
. The input/output of signals into/from a semiconductor integrated circuit (LSI) having the input/output circuit shown in
FIG. 12
is entirely performed via an input/output pad C
03
. The source diffusion region C
02
a
is grounded. Therefore, in the initial state, the potential at the p-well diffusion region C
02
d
is as low as the ground voltage due to the PN junction with the source diffusion region C
02
a.
The operation of the input/output circuit with the above configuration is as follows. Herein, the case that a voltage is applied from outside when the input/output circuit is in the input state is described. When an input signal at a voltage VL (V) lower than the ground voltage is applied to the input/output pad C
03
, the voltage at the p-well diffusion region C
02
d
drops to as low as VL (V) due to the PN junction with the drain diffusion region C
02
c
. A current flows from the input/output pad C
03
during the discharging of the p-well diffusion region C
02
d
to VL (V). However, the current flow stops once the potential at the p-well diffusion region C
02
d
reaches VL (V). Also, at this time, a reverse voltage is applied to the PN junction between the p-well diffusion region C
02
d
and the source diffusion region C
02
a
. Therefore, no large current will flow between the p-well diffusion region C
02
d
and the source diffusion region C
02
a
. Accordingly, using the conventional input/output circuit shown in
FIG. 12
, the LSI is prevented from destruction even when a voltage lower than the ground voltage is input into the LSI.
However, the related art described above has the following problems. In the input/output circuit shown in
FIG. 11
, after a voltage higher than the supply voltage is applied during input, the potential at the n-well diffusion region B
02
d
of the p-channel transistor B
02
is higher than the supply voltage during output. This deteriorates the current flow capability due to a back bias effect.
In the input/output circuit shown in
FIG. 12
, after a voltage lower than the ground voltage is applied during input, the potential at the p-well diffusion region C
02
d
of the n-channel transistor C
02
is lower than the ground voltage during output. This deteriorates the current flow capability due to the back bias effect.
SUMMARY OF THE INVENTION
An object of the present invention is providing an input/output circuit capable of preventing deterioration in current flow capability due to the back bias effect.
According to one aspect of the present invention, the input/output circuit is an input/output circuit of a semiconductor integrated circuit, including a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit draws a charge from an n-well diffusion region of the first p-channel transistor.
According to another aspect of the invention, the input/output circuit is an input/output circuit of a semiconductor integrated circuit, including a first n-channel transistor and a charge drawing circuit. The first n-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit draws a charge from a p-well diffusion region of the first n-channel t

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