Input-output circuit of reduced device area for semicustom semic

Details Input-output circuit of reduced device area for semicustom semic Input-output circuit of reduced device area for semicustom semic

1990-08-08

1992-02-11

Hille, Rolf

357 40, H01L 2702

Patent

active

050879553

ABSTRACT:
A peripheral block of a semicustom integrated circuit comprises one input/output pad formed on a peripheral portion of a substrate and an N-channel MOS transistor formed in proximity of the input/output pad. A wiring conductor extends from the input/output pad to an internal circuit, and one the way, is connected to a drain region of the N-channel MOS transistor. A source and a gate of the N-channel MOS transistor is connected to a ground so as to function as a diode for protecting a large voltage inputted to the input/output pad, from the internal circuit.

REFERENCES:
patent: 3983543 (1976-09-01), Cordaro
patent: 4591894 (1986-05-01), Kawakami et al.
patent: 4908531 (1990-03-01), Podell et al.
patent: 4945395 (1990-07-01), Suehiro

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