Boots – shoes – and leggings
Patent
1988-06-09
1989-09-19
Williams, Jr., Archie E.
Boots, shoes, and leggings
264230, 2642302, 2642426, G06F 1320, G06F 1342
Patent
active
048687421
ABSTRACT:
A communication bus (14) provides bidirectional data communication between a computer (12) and various peripheral units including input/output processors (18, 20) and a service processor (22). The computer includes a memory control unit (24) which is connected to a memory array (26). A central processor unit (30) is connected for data exchange with the memory control unit (24). Data blocks are transferred through the bus (14) and either originate or terminate at the memory array (26). A peripheral unit, such as the processor (18) transfers a data block by first transferring a header parcel (146) which defines an address, block length and type of function. This is transmitted to the memory control unit (24) which carries out the desired data transfer by sending or receiving sequential data parcels. An interrupt bus (16) connects each of the units of the computer system (10) including the processors (18, 20, 22) and the central processing unit (30). Any one of the units connected to the interrupt bus ( 16) can interrupt any of the other units. The interrupt process comprises sending an interrupt vector through interrupt lines (66). At the receiving unit the interrupt is identified and the appropriate function carried out. The combination of the communication bus and the interrupt bus (16) comprises an input/output bus for the computer system (10) to provide a high data bandwidth together with flexible operation.
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Kuck, D. J., "The Structure of Computers and Computations", 1978, Chap. 6.
Gant Alan D.
Jones Thomas M.
Kimmel Arthur T.
Nobles David A.
Chan Emily Y.
Convex Computer Corporation
Williams Jr. Archie E.
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