Input/output buffer layout having overlapping buffers for reduci

Details Input/output buffer layout having overlapping buffers for reduci Input/output buffer layout having overlapping buffers for reduci

1995-07-07

1997-06-24

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular chip input/output means

257208, H01C 2710

Patent

active

056419783

ABSTRACT:
The I/O buffer layout of a pad-limited die comprises a pad ring having four partially-overlapping I/O-buffer arrays arranged in a pinwheel pattern at the periphery of a square die. To enable electrical interconnection of transversely-overlapping I/O buffers with the core logic of the die, overlapping I/O buffers of adjacent I/O-buffer arrays are separated by routing channels and the circuitry of longitudinally-overlapping buffers is abridged so that each of these buffers is capable of performing only a limited range of functions.

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