Input operand size and hi/low word selection control in data pro

Details Input operand size and hi/low word selection control in data pro Input operand size and hi/low word selection control in data pro

1996-10-08

1999-03-09

Ellis, Richard L.

395562, 395564, G06F 934

Patent

active

058812598

ABSTRACT:
A data processing system having a plurality of registers 10 and an arithmetic logic unit 20, 22, 24 includes program instruction words having a source register bit field Sn specifying one of the registers storing an input operand data word together with an input operand size flag indicating whether the input operand has an N-bit size or (N/2)-bit size together with a high/low location flag indicating which of the high order bit positions or low order bit positions stores the input operand if it is of the smaller size. It is preferred that the arithmetic logic unit is also able to perform parallel operation program instruction words operating independently upon (N/2)-bit input operand data words stored in respective halves of a register.

REFERENCES:
patent: 3735355 (1973-05-01), Balogh, Jr. et al.
patent: 3987291 (1976-10-01), Gooding et al.
patent: 4258419 (1981-03-01), Blahut et al.
patent: 4679140 (1987-07-01), Gotou et al.
patent: 4785393 (1988-11-01), Chu et al.
patent: 4825355 (1989-04-01), Kurakazu et al.
patent: 5132898 (1992-07-01), Sakamura et al.
patent: 5155820 (1992-10-01), Gibson
patent: 5442769 (1995-08-01), Corcoran et al.
patent: 5669012 (1997-09-01), Shimizu et al.
Motorola, MC88110 Second Generation RISC Microprocessor User's Manual, 1991, pp. 5-1 through 5-25.
Iacobovici, Sorin, "A Pipelined Interface for High Floating-Point Performance with Precise Exceptions", IEEE Micro, vol. 8, No. 3, Jun. 1, 1988, pp. 77-87.
Kiyohara, Tokuzo et al., Register Connection: A New Approach to Adding Registers into Instruction Set Architectures, Computer Architecture News, vol. 21, No. 2, May 1, 1993, pp. 247-256.
Lee, Ruby B., "Subword Parallelism with MAX-2", IEEE Micro, vol. 16, No. 4, Aug. 1, 1996, pp. 51-59.
Muller, Mike, "ARM6 a High Performance Low Power Consumption Macrocell", Proceedings of the Spring Computer Society International Conference (COMPCON), No. Conf. 38, Feb. 22, 1993, Institute of Electrical and Electronics Engineers, pp. 80-87.
Sarkar, S. et al., "DSP Coprocessor for Event Filtering in a Data Acquitsition System", 1990 IEEE Nuclear Science Symposium Conference Record, vol. 1 of 2, Oct. 22-27, 1990, pp. 313-317.

Affiliated with

Also associated with

Rating

Input operand size and hi/low word selection control in data pro does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Input operand size and hi/low word selection control in data pro, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Input operand size and hi/low word selection control in data pro will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1330764