Input interface circuit as a buffer of a logic device to improve

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307477, 307593, 307289, H03K 3013, H03K 3283, H03K 1716, H03K 19092

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active

046148841

ABSTRACT:
An input interface circuit for a logic device which has a first transistor whose base is supplied with an input signal and whose emitter is grounded through first and second resistors and a second transistor whose base is supplied with the potential of the node of the first and second resistors and whose collector sends forth a logic signal. This input interface circuit is further provided with a third resistor connected between the second resistor and ground and a third transistor whose current path is connected in parallel to the third resistor and whose base is connected to the collector of the second transistor.

REFERENCES:
patent: 3129344 (1964-04-01), Lemon, Jr.
patent: 3259854 (1966-07-01), Marcus et al.
patent: 3327134 (1967-06-01), Keane
patent: 3700929 (1972-10-01), Frederiksen
patent: 3755693 (1973-08-01), Lee
patent: 3846647 (1974-11-01), Tanimoto
patent: 4115711 (1978-09-01), Moussie
patent: 4259601 (1981-03-01), Stein
Radio Rernsehen Elektronik, vol. 28, No. 9, Sep. 1979, pp. 560-562, Berlin, DD; G. Turinsky: "Digitale Pegelwandler fur LSI- Schaltkreise".

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