Input follower system and method

Amplifiers – With semiconductor amplifying device – Including frequency-responsive means in the signal...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C330S250000, C330S253000

Reexamination Certificate

active

06838943

ABSTRACT:
An equalizer circuit for equalizing first and second differential input signals comprises a differential pair, a reactive load, and first and second input followers. The differential pair defines first and second input nodes and first and second output nodes, and the reactive load is coupled to the differential pair. The first input follower circuit is connected to the first input node of the differential pair and is operable to receive the first differential input signal and to receive a first feedback signal from the differential pair and in response to generate a first input signal at the first input node of the differential pair. The second input follower circuit is connected to the second input node of the differential pair and is operable to receive the second differential input signal and to receive a second feedback signal from the differential pair and in response to generate a second input signal at the second input node of the differential pair.

REFERENCES:
patent: 4590394 (1986-05-01), Pace
patent: 4862103 (1989-08-01), Funada
patent: 5099366 (1992-03-01), Ahlgrim
patent: 5426389 (1995-06-01), Webster
patent: 5606284 (1997-02-01), Tamesue et al.
patent: 5761251 (1998-06-01), Wender
patent: 5995168 (1999-11-01), Yagi
patent: 6304615 (2001-10-01), Webster
patent: 6489838 (2002-12-01), Tsinker
patent: 6492876 (2002-12-01), Kamal et al.
patent: 20010052811 (2001-12-01), Kim
patent: 20030043897 (2003-03-01), Papanikolaou et al.
patent: 3545263 (1985-12-01), None
patent: 073400 (1982-08-01), None
patent: 90313649.7 (1991-07-01), None
patent: 94300490.3 (1994-08-01), None
patent: 2-2665808 (1990-08-01), None
Johns, David, Martin, Ken “Analog Integrated Circuit Design”, University of Toronto, John Wiley & Sons, pp. 1-3.
Gray, Paul R., Meyer, Robert G. “Analysis and Design of Analog Integrated Circuits”, John Wiley & Sons, pp. 1-3.
Shakiba, Mohammea Hossein, WP 23.3 A 2.Gb/s Adaptive Cable Equalizer, 1999 IEEE International Solid-State Circuits Conference, pp. 1-10.
Baker, Alan, J., “FA 10.7: An Adaptive Cable Equalizer for Serial Digital Video Rates to 400 MB/s”, 1999 IEEE International Solid State Circuits Conference, pp. 1-2.
Maxim Integrated Products, “3.2 Gbps Adaptive Qualizer”, pp. 1-10., Sunnvale California.
DDWG, Digital Display Working Group, “Digital Visual Interface DVI”, Revision 1.0, pp. 1-76, Apr. 2, 1999.
InFocus Corporation, “Digital Visual Interface DVI”, Nov. 2001, pp. 1-10.
Chang, Luke, Goodart, Joe, “Digital Visual Interface”, May 2000, Technology Brief, pp. 1-4.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Input follower system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Input follower system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Input follower system and method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3429363

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.