Input driver for a differential folder employing a static...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S560000, C327S531000, C326S089000, C330S258000

Reexamination Certificate

active

06445221

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates generally to analog to digital (A/D) converters and in particular to folder circuits. Still more particularly, the present invention relates to an input driver for use with a differential folder having a static ladder and a method of operation thereof.
2. Description of the Related Art
There are various types of devices, typically called analog to digital converters (A/D), for converting an analog voltage to a digital signal representative of the analog voltage. One type of A/D converter is a “flash” converter wherein an analog signal is applied to multiple identical comparators, generally one for each possible quantization level. For example, for a device that generates a n-bit digital output word, there are 2
n
possible quantization levels and one fewer comparator. An eight-bit A/D converter would typically have 2
8
−1, i.e., 255, comparators, each of which receives two inputs. The analog signal to be converted is applied to one input of each of the comparators and each comparator other input is tied to different, normally equally spaced, reference voltage. These reference voltages are typically derived from a reference static ladder, such as a resistance ladder. When a convert signal is applied to the comparators, each of the comparators that is tied to a reference voltage higher than the analog input signal generates a “1” output signal. The comparators that are tied to reference voltages lower in value than the analog input signal generate “0” output signals. The resultant outputs are sometimes referred to as a “thermometer code” of “1's” and “0's” arrayed on each side of a transition point that represents the analog input signal. The location of this transition point is then decoded to produce a digital output representation of the analog input signal at that point in time.
Folding is a type of analog preprocessing that is utilized to reduce the number of comparators in an A/D converter, such as the flash converter described above. A simplified block diagram of an exemplary folding A/D converter
100
is depicted in FIG.
1
. Folding A/D converter
100
includes a preprocessing section
110
that so includes a plurality of folding circuits, or folders, that receive an analog input signal. The pre-processed analog signal is then provided to an interpolation section
120
prior to delivery to a comparator and logic section
130
that, in turn, generates a N-bit digital output signal. This method is employed to reduce the number of A/D comparators for a given N bit A/D. For example, a six-bit flash A/D would typically need sixty-three comparators. A folding type A/D with four folders, on the other hand, would only employ sixteen comparators for the least significant bit (LSB) information and three comparaters for the most significant bit (MSB) information. For more information on how a Folding A/D circuit operates, see “A 70-MS/s 110-mW 8-b CMOS Folding and Interpolating A/D Converter” by Braum Nauta, et al, IEEE Journal of Solid-State Circuits, vol. 30, no. 12, December 1995, pp. 1302-1308, which is herein incorporated in its entirety by reference.
A schematic diagram of an embodiment of an exemplary single-ended folder circuit
200
is illustrated in FIG.
2
. In practice, folder
200
would typically be one of N (where N>1) folder stages. In the depicted embodiment, transistors Q
1
-Q
8
represent a typical folding stage with load resistors R
0
and R
1
. The driving stage for folder
200
includes transistor Q
9
that is coupled to an input AC signal Vin. A reference ladder comprising of resistors R
6
-R
8
and coupled to a ladder reference signal Ladder_Reference provides voltage references V-N
1
, V_N
2
, V_N
3
and V_N
4
for the differential amplifier pairs in the folding stage. It should be noted that for simplicity, only one folding stage is shown. Those skilled in the art should readily appreciate that a practical implementation may include four or more folder stages utilizing a single static reference ladder and one folder driver. An exemplary graph illustrating the relationship between an output voltage Vout and the input voltage Vin for the single-ended folder
200
is depicted in FIG.
3
A. The characteristic folding operation is shown as input voltage Vin increases. As input voltage Vin increases in value, the differential amplifier pair of transistors Q
1
and Q
2
switches a current J
1
across load resistors R
0
and R
1
. The continual increase of input voltage Vin will subsequently alternate currents J
2
, J
3
and J
4
across load resistors R
0
and R
1
, resulting in output voltage Vout reversing polarity at each zero crossing.
Additional folding may be utilized to produce additional folding signals to drive into each A/D comparator. Ultimately each A/D comparator is driven by its own unique folded waveform whose zero crossing is typically shifted by one LSB. Thus a six-bit A/D with four folders would need sixteen folded signals. To obtain sixteen folded signals employing only four folder stages, an interpolation technique is utilized to generate four waveforms per one folder stage.
FIG. 3B
illustrates an exemplary graph of the signal outputs generated by four folder stages, generally designated F
1
, F
2
, F
3
and F
4
, versus an input voltage Vin, i.e., a linear ramp in the illustrative embodiment. As shown in the illustrated graph, the zero crossings of each of the four folder outputs F
1
, F
2
, F
3
and F
4
are spaced by about 100 mV of input voltage Vin signal change.
One important parameter of folding A/Ds is the integrity of the zero crossings of the folder outputs. The A/D comparators discern between a logic “1” or “0” utilizing the folder output signals and the signals generated by the interpolation process. The exemplary graph depicted in
FIG. 4A
presents a closer look at interpolated signals, designated F
2
_A, F
2
_B and F
2
_C generated by folder outputs F
2
and F
3
. It should be noted that these five signals, F
2
_A, F
2
_B, F
2
_C, F
2
and F
3
would typically be the input signals for the A/D comparators. The distance between the zero crossings, e.g., referenced as VLSB, determines the input voltage margin between each of the comparators referenced to input signal Vin. As shown in
FIG. 4A
, input signal Vin increases 25 mV from when interpolated signal F
2
_A crossed zero to when interpolated signal F
2
_B crossed zero. Since the folders generally have gain, i.e., Vout/Vin>1, the actual voltage margin as seen by the A/D comparator is VLSB_out=VLSB_in(Gain). For example, if the Gain is 2.8, the resultant VLSB_out=25 mV(2.8)=70 mV.
In the event that time-dependent noise disrupts input signal Vin relative to the static ladder reference voltages, the folder outputs F
2
and F
3
will also shift their respective zero crossings with respect to input signal Vin. To illustrate, with reference to
FIG. 4B
, a 25 mV shift of common mode noise will cause input signal Vin to also shift 25 mV. This, in turn, will also result in the interpolated zero crossing shifting to cause a 70 mV, one LSB error as seen by the comparators. This is a highly undesirable condition for an A/D converter needing to achieve one-half (½) LSB accuracy that has high speed interference on its input power supply.
Accordingly, what is needed in the art is an improved folding A/D converter that mitigates the above-described limitations.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an improved differential folder for use in an analog to digital (A/D) converter.
It is another object of the present invention to provide an input driver for use with a differential folder having a static ladder and a method of operation thereof.
To achieve the foregoing objects, and in accordance with the invention as embodied and broadly described herein, an input driver for use with a differential folder having a static ladder that provides an array of reference voltages is disclosed. The input driver

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