Input circuit of semiconductor integrated circuit and semiconduc

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307451, 307475, 307579, 307279, H03K 19017

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active

050737260

ABSTRACT:
There is disclosed a semiconductor integrated circuit provided with an input circuit including an N-channel MOS transistor of which threshold voltage is set to a value lower than those of N-channel MOS transistors constituting other internal circuits of the integrated circuit. Thus, a circuit having a high operating margin for power supply noises is provided. This circuit further comprises a P-channel MOS transistor constituting a portion of a NOR gate or a NAND gate together with the above-mentioned N-channel MOS transistor.

REFERENCES:
patent: 4250406 (1981-02-01), Alaspa
patent: 4525640 (1985-06-01), Boyle et al.
patent: 4532439 (1985-07-01), Koike
patent: 4584491 (1986-04-01), Ulmer
patent: 4682055 (1987-07-01), Upadhyayula
R. D. Jolly, et al., "A 35-ns 64K EEPROM", IEEE Journal of Solid-State Circuits, vol. SC-20, No. 5, Oct. 1985, pp. 971-978.
Patent Abstracts of Japan, vol. 6, No. 81, 19th May 1982 & JP-A-57 17 223.

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