Input buffer with reduced offset for operational amplifiers or t

Details Input buffer with reduced offset for operational amplifiers or t Input buffer with reduced offset for operational amplifiers or t

1992-05-19

1993-05-18

Mottola, Steven

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

330288, H03F 330

Patent

active

052124576

ABSTRACT:
An amplifier circuit for use as a unity gain buffer or an input stage in a current-mode feedback amplifier. As a unity gain buffer, the circuit has very low output impedance and wide dynamic range while having low offset. As an input stage, the circuit has a very low impedance inverting input and a high impedance non-inverting input with wide dynamic range and low offset. The circuit has two mirror image halves, each half having four transistors of the same polarity type and a current mirror. Each half is biased by a current source, the sources having nearly identical current.

REFERENCES:
patent: 4639685 (1987-01-01), Saller et al.
patent: 4780689 (1988-10-01), Saller et al.
patent: 5049653 (1991-09-01), Smith et al.
"Bipolar and MOS Analog Integrated Circuit Design," by Alan B. Grebene, 1984, pp. 255-261.

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