Input buffer circuit having function of canceling offset...

Details Input buffer circuit having function of canceling offset... Input buffer circuit having function of canceling offset...

2005-03-29

2005-03-29

Choe, Henry (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C330S260000

Reexamination Certificate

active

06873209

ABSTRACT:
An input buffer circuit without a drop of a capability of a circuit and a limitation of a connection type with a circuit of a former stage is obtained. The output signal (OUTB) is inputted to a first low pass filter circuit, and the first low pass filter circuit integrates the output signal (OUTB). A result of the integration is stored as a voltage value (V2a) in the capacitor (4s). In the same manner, an output signal (OUT) is inputted to a second low pass filter circuit, and the second low pass filter circuit integrates the output signal (OUT). A result of the integration is stored as a voltage value (V2b) in a capacitor (4t). A differential amplifier circuit (5) generates appropriate voltages (V3aand V3b) according to a design specification of the transistors (1xand1y) by amplifying the voltage values (V2aand V2b) and outputs them. The voltages (V3aand V3b) are impressed on respective back gates of the transistors (1xand1y), respectively.

REFERENCES:
patent: 4578647 (1986-03-01), Sasamura
patent: 4841254 (1989-06-01), Bukowski et al.
patent: 5130666 (1992-07-01), Nicollini
patent: 5187448 (1993-02-01), Brooks et al.
patent: 5394113 (1995-02-01), Belcher
patent: 6362687 (2002-03-01), Cox
patent: 4-192703 (1992-07-01), None
patent: 2002-9561 (2002-01-01), None
patent: 2003-8407 (2003-01-01), None

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