Communications: electrical – Condition responsive indicating system – Specific condition
Reexamination Certificate
2000-08-30
2002-07-09
Trieu, Van (Department: 2632)
Communications: electrical
Condition responsive indicating system
Specific condition
C340S652000, C340S870160
Reexamination Certificate
active
06417776
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an input buffer circuit for receiving differential data through a cable and for detecting the state of cable connection. The cable has a characteristic impedance and terminating resistors are coupled with the cable, and the input buffer circuit has the ability to determine whether the cable is connected.
2. Description of the Related Art
High-speed transmission of signals through a signal transmission medium requires adjustments of impedance and signal amplitude. In this case, the signal transmission medium is a cable. The impedance refers to the characteristic impedance (Z
0
) of the cable and the load impedance (ZL) of a load connected to the cable. Also, the transmission of signals may be carried out using the basic serial protocol, Universal Serial Bus (USB) protocol, IEEE 1394 protocol, or the like.
FIG. 7
illustrates the connection relationship between the characteristic impedance and the load impedance. A driver
2
is connected to the input end of the cable
1
, and a load
3
is connected to the output end of the cable
1
. The cable 1 has a characteristic impedance Z
0
, and the load
3
has a load impedance ZL. The driver
2
represents a transmitting circuit for sending signals, and the load
3
represents a receiving circuit for receiving signals.
Unless the characteristic impedance Z
0
and the load impedance ZL are matched, signals are reflected in the cable
1
. The magnitude of reflection is expressed by the following reflection coefficient.
Reflection coefficient=reflection voltage/incident voltage=(ZL−Z
0
)/(ZL+Z
0
)
When the reflection coefficient is large, high-speed signal transmission becomes difficult.
Reducing the amplitude of the signal shortens the time required for signal level changes, and leads to an increase in the speed of signal transmission. There are two modes of signal level changes. One is a manner of signal change from high level to low level, and the other is a manner of signal change from low level to high level.
FIG. 8
illustrates the connection relationship between a terminating resistor and the characteristic impedance. In this diagram, the parts that are the same as those in
FIG. 7
are shown by the same reference symbols (so that duplicate explanations are omitted). A receiver
4
and a terminating resistor
5
are connected to the output end of the cable
1
. A terminating voltage Vt is impressed on (applied to) the terminating resistor
5
. The receiver
4
is a receiving circuit for receiving signals. The terminating resistor
5
has a resistance value ZT matching the characteristic impedance Z
0
of the cable
1
. In this case, the characteristic impedance Z
0
is 50 to 1,000 &OHgr;. The resistance value ZT is the same as the characteristic impedance Z
0
. The terminating voltage Vt is chosen to be a value (0 to source voltage V) to suit the resistance value ZT.
The terminating resistor
5
enables the reflection voltage to become zero. When the reflection voltage is zero, the reflection coefficient of the cable
1
becomes zero. The magnitude of signal amplitude on the cable
1
is determined by the ratio of the impedance of the driver
2
and the resistance value ZT. The magnitude of the signal amplitude is minimized when the reflection coefficient is zero. Signals of small amplitude are received in the input buffer of the receiver
4
. The input buffer has a differential circuit (differential amplifier circuit), and adjusts the amplitude levels of incoming signals and outputs signals whose amplitude levels have been adjusted. The receiver
4
then executes its own processing steps using the signals of the adjusted amplitude levels.
The technologies related to the differential circuit as above are disclosed in Japanese Unexamined Patent Application, First Publication No. Sho 57-203305 (reference
1
) and Japanese Unexamined Patent Application, First Publication No. Sho 60-252928 (reference
2
). Reference
1
discloses a technique of using the offset voltage of the differential circuit for temperature variation compensation and source voltage variation compensation.
In the USB protocol and IEEE 1394 protocol, whether the cable is attached (connected) to the board is monitored by a cable detection device. The technology related to detection of a cable connection is disclosed in U.S. Pat. No. 4,855,722 (reference
3
, corresponding to Japanese Unexamined Patent Application, First Publication No. Sho 63-100380), Japanese Unexamined Patent Application, First Publication No. Hei 11-45130 (reference
4
), and in Japanese Patent (Granted) Publication No. 2564432 (reference
5
). Reference
3
discloses a differential circuit for detecting alternating current power loss. Reference
4
discloses a cable output control circuit according to the IEEE 1394 protocol. Reference
5
discloses a detection device for detecting disconnection of the signal transmission line of an electric apparatus.
FIG. 9
shows an example of the input buffer circuit for receiving signals through the cable. This input buffer comprises a first transistor
11
, a second transistor
12
, a constant current source
13
, and resistors
14
,
15
. The input buffer is provided with a first terminating resistor
16
and a second terminating resistor
17
. The input buffer is further provided with an output conversion circuit
18
and a non-inverting circuit
19
.
The first and second transistors
11
,
12
are comprised by n-channel field-effect transistors (FET). The gate lengths of the first and second transistors
11
,
12
are equal. The differential circuit is comprised by the first transistor
11
, the second transistor
12
, the constant current source
13
, and the resistors
14
,
15
. First input signal Si
1
is input into the gate of the first transistor
11
, and second input signal Si
2
is input into the gate of the second transistor
12
. Outputs from the differential circuit are input into the output conversion circuit
18
. Output from the output conversion circuit
18
is input into the non-inverting circuit
19
. Output from the non-inverting circuit
19
represents output signal So
1
.
FIG. 10
shows the operational characteristics of the input buffer shown in FIG.
9
. In
FIG. 10
, the horizontal axis represents time axis, and the vertical axis represents voltage value axis. When the input signal Si
2
is high level and the input signal Si
1
is low level, the output signal So
1
is at the low level. As the magnitude of the input signal Si
1
increases, the magnitude of the input signal Si
2
decreases. The magnitude of the input signal Si
1
and the magnitude of the input signal Si
2
become identical at time t
1
. At this point in time t
1
, the level of the output signal So
1
changes from the low level to the high level.
FIG. 11
shows an example of the configuration of the USB system. The USB system shown in this diagram comprises a first USB board
21
, a second USB board
22
, and a cable
23
. The first USB board
21
comprises a pull-up resistor
24
, a driver
25
, and a receiver
26
. The second USB board
22
comprises a pull-down resistor
27
, a driver
28
, a receiver
29
, and a cable detector
30
.
The resistance value of the pull-up resistor
24
is 1.5 K&OHgr;. The resistance value of the pull-down resistor
27
is 15 K&OHgr;. The characteristic impedance Z
0
of the cable
23
is 90 &OHgr;.
The cable detector
30
detects a connection between the second USB board
22
and the cable
23
. The connection is detected according to the effects of the pull-down resistor
27
and the pull-up resistor
24
. That is, when the second USB board
22
and the cable
23
are not connected to each other, the input level of the second USB board
22
is set to the low level. This level setting is performed by the effect of the pull-down resistor
27
, and the output of the cable detector
30
is set to the low level. When the second USB board
22
and the cable
23
are connected to each other, the input level of the second USB boa
NEC Corporation
Trieu Van
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