Input buffer circuit for a semiconductor memory

Details Input buffer circuit for a semiconductor memory Input buffer circuit for a semiconductor memory

1996-03-28

1997-08-05

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327307, 327319, 326 71, 326 81, H01J 1982

Patent

active

056546645

ABSTRACT:
An input buffer circuit of a semiconductor memory capable of controlling a logic threshold voltage of the circuit according to a change in an external supply voltage, which includes an external supply voltage detecting unit for dividing the external supply voltage into a plurality of regions by comparing a plurality of voltages, which have been divided by different ratios of the entire external supply voltage, with a standard voltage; and a converting unit including a pull-up circuit and a pull-down circuit, for converting input signals of TTL level into signals of CMOS level, according to the regions of the external supply voltage obtained by the external supply voltage detecting unit. The input buffer has an advantage in that margins for a logical high input range and logical low input range are improved when converting voltages of TTL level into voltages of CMOS level, by controlling the logic threshold voltage so as to lower the logic threshold voltage when the external supply voltage level is high and raise the logic threshold voltage when the external supply voltage level is low.

REFERENCES:
patent: 5534801 (1996-07-01), Wu et al.
patent: 5589783 (1996-12-01), McClure
IBM Tech. Disc. Bul. "Current Mode Level Shifter and Off Chip Receiver" vol. 37 No. 11 Nov. 1994.

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